/8-($-PMarvell Armada 8040 DB boardXmarvell,armada8040-dbmarvell,armada8040marvell,armada-ap806-quadmarvell,armada-ap806 aliases",/ap806/config-space/serial@512000"4/ap806/config-space/serial@512100psci arm,psci-0.2 okayusb3@510000$marvell,armada-8k-xhcigeneric-xhciQ@ = okayxor@6a0000%marvell,armada-7k-xormarvell,xor-v2jk xor@6c0000%marvell,armada-7k-xormarvell,xor-v2lm spi@700600marvell,armada-380-spipP    disabledspi@700680marvell,armada-380-spipP    disabledi2c@701000marvell,mv78230-i2cp   V okayHi2c@701100marvell,mv78230-i2cp   W  disabledpcie@f2600000#marvell,armada8k-pciesnps,dw-pcie ` ctrlconfig [pci8T$     disabledpcie@f2620000#marvell,armada8k-pciesnps,dw-pcie b ctrlconfig [pci8T$" "   disabledpcie@f2640000#marvell,armada8k-pciesnps,dw-pcie d ctrlconfig [pci8T$! !  okaycp110-slave  simple-busCTconfig-space  simple-busCTsystem-controller@440000(marvell,cp110-system-controller0sysconDo6cps-apllcps-ppv2-corecps-eipcps-corecps-nand-corecps-audiocps-communitcps-nandcps-ppv2cps-sdiocps-mg-domaincps-mg-corecps-xor1cps-xor0cps-gop-dpnonecps-pcie_x10cps-pcie_x11cps-pcie_x4cps-pcie-xorcps-satacps-sata-usbcps-maincps-sd-mmcnonenonecps-slow-iocps-usb3h0cps-usb3h1cps-usb3devcps-eip150cps-eip197sata@540000marvell,armada-8k-ahciT  okayusb3@500000$marvell,armada-8k-xhcigeneric-xhciP@  okayusb3@510000$marvell,armada-8k-xhcigeneric-xhciQ@  okayxor@6a0000%marvell,armada-7k-xormarvell,xor-v2jk xor@6c0000%marvell,armada-7k-xormarvell,xor-v2lm spi@700600marvell,armada-380-spipP    disabledspi@700680marvell,armada-380-spipP    disabledi2c@701000marvell,mv78230-i2cp   6 okayHi2c@701100marvell,mv78230-i2cp   7  disabledpcie@f4600000#marvell,armada8k-pciesnps,dw-pcie ` ctrlconfig [pci8T$    disabledpcie@f4620000#marvell,armada8k-pciesnps,dw-pcie b ctrlconfig [pci8T$    disabledpcie@f4640000#marvell,armada8k-pciesnps,dw-pcie d ctrlconfig [pci8T$   okaychosenserial0:115200n8memory@00000000memory modelcompatible#address-cells#size-cellsserial0serial1methodinterrupt-parentranges#interrupt-cellsinterrupt-controllerinterruptsreglinux,phandlemsi-controllerarm,msi-base-spiarm,msi-num-spismarvell,odmi-framesmarvell,spi-basemsi-parentdma-coherentcell-indexclocksstatusspi-max-frequencylabeltimeout-msclock-frequencyreg-shiftreg-io-width#clock-cellsclock-output-namesdevice_typeenable-methodcore-clock-output-namesgate-clock-output-namesreg-namesbus-rangeinterrupt-map-maskinterrupt-mapnum-lanesstdout-path