U8Rp(vR8apm,mustangapm,xgene-storm +7APM X-Gene Mustang boardcpus+cpu@0=cpu apm,potenzaI Mspin-table[lcpu@1=cpu apm,potenzaI Mspin-table[lcpu@100=cpu apm,potenzaI Mspin-table[lcpu@101=cpu apm,potenzaI Mspin-table[lcpu@200=cpu apm,potenzaI Mspin-table[lcpu@201=cpu apm,potenzaI Mspin-table[lcpu@300=cpu apm,potenzaI Mspin-table[lcpu@301=cpu apm,potenzaI Mspin-table[ll2-cache-0cache}l2-cache-1cache}l2-cache-2cache}l2-cache-3cache}interrupt-controller@78010000arm,cortex-a15-gic@Ixxx x   refclk fixed-clockrefclktimerarm,armv8-timer0 pmuapm,potenza-pmu  soc simple-bus+clocks+pcppll@17000100apm,xgene-pcppll-clockpcppllIpcppllDsocpll@17000120apm,xgene-socpll-clocksocpllI socpllDsocplldiv2fixed-factor-clock socplldiv2%0 socplldiv2ahbclk@17000000apm,xgene-device-clockI :div-regDdSaahbclksdioclk@1f2ac000apm,xgene-device-clock I* :csr-regdiv-regozDxSasdioclkethclkapm,xgene-device-clockethclkI:div-regD8S aethclk menetclkapm,xgene-device-clock I:csr-reg menetclk#sge0clk@1f21c000apm,xgene-device-clockI!:csr-regz sge0clk&xge0clk@1f61c000apm,xgene-device-clockIa:csr-regzxge0clk)xge1clk@1f62c000apm,xgene-device-clock disabledIb:csr-regzxge1clk+sataphy1clk@1f21c000apm,xgene-device-clockI!:csr-reg sataphy1clk disabledozsataphy1clk@1f22c000apm,xgene-device-clockI":csr-reg sataphy2clkokayoz:sataphy1clk@1f23c000apm,xgene-device-clockI#:csr-reg sataphy3clkokayoz:sata01clk@1f21c000apm,xgene-device-clockI!:csr-reg sata01clkoz9sata23clk@1f22c000apm,xgene-device-clockI":csr-reg sata23clkoz9sata45clk@1f23c000apm,xgene-device-clockI#:csr-reg sata45clkoz9 rtcclk@17000000apm,xgene-device-clockI :csr-rego zrtcclk"rngpkaclk@17000000apm,xgene-device-clockI :csr-rego z rngpkaclk,pcie0clk@1f2bc000okayapm,xgene-device-clockI+:csr-reg pcie0clkpcie1clk@1f2cc000 disabledapm,xgene-device-clockI,:csr-reg pcie1clkpcie2clk@1f2dc000 disabledapm,xgene-device-clockI-:csr-reg pcie2clkpcie3clk@1f50c000 disabledapm,xgene-device-clockIP:csr-reg pcie3clkpcie4clk@1f51c000 disabledapm,xgene-device-clockIQ:csr-reg pcie4clkdmaclk@1f27c000apm,xgene-device-clockI':csr-regdmaclk-msi@79000000apm,xgene1-msiIysystem-clk-controller@17000000apm,xgene-scusysconI reboot@17000014syscon-reboot L~csw@7e200000apm,xgene-cswsysconI~  mcba@7e700000apm,xgene-mcbsysconI~p mcbb@7e720000apm,xgene-mcbsysconI~r efuse@1054a000apm,xgene-efusesysconIT rb@7e000000apm,xgene-rbsysconI~edac@78800000apm,xgene-edac+   Ix$ !'edacmc@7e800000apm,xgene-edac-mcI~edacmc@7e840000apm,xgene-edac-mcI~edacmc@7e880000apm,xgene-edac-mcI~edacmc@7e8c0000apm,xgene-edac-mcI~edacpmd@7c000000apm,xgene-edac-pmdI| edacpmd@7c200000apm,xgene-edac-pmdI| edacpmd@7c400000apm,xgene-edac-pmdI|@ edacpmd@7c600000apm,xgene-edac-pmdI|` edacl3@7e600000apm,xgene-edac-l3I~`edacsoc@7e930000apm,xgene-edac-soc-v1I~pmu@78810000apm,xgene-pmu-v2+   Ix "pmul3c@7e610000apm,xgene-pmu-l3cI~apmuiob@7e940000apm,xgene-pmu-iobI~pmucmcb@7e710000apm,xgene-pmu-mcbI~qpmucmcb@7e730000apm,xgene-pmu-mcbI~spmucmc@7e810000apm,xgene-pmu-mcI~pmucmc@7e850000apm,xgene-pmu-mcI~pmucmc@7e890000apm,xgene-pmu-mcI~pmucmc@7e8d0000apm,xgene-pmu-mcI~pcie@1f2b0000okay=pci$apm,xgene-storm-pcieapm,xgene-pcie+ I+:csrcfgTC8BB&0CQ^pcie@1f2c0000 disabled=pci$apm,xgene-storm-pcieapm,xgene-pcie+ I,:csrcfgTрC8BB&0CQ^pcie@1f2d0000 disabled=pci$apm,xgene-storm-pcieapm,xgene-pcie+ I-:csrcfgTC8BB&0CQ^pcie@1f500000 disabled=pci$apm,xgene-storm-pcieapm,xgene-pcie+ IP:csrcfgTC8BB&0CQ^pcie@1f510000 disabled=pci$apm,xgene-storm-pcieapm,xgene-pcie+ IQ :csrcfgTC8BB&0CQ^mailbox@10540000apm,xgene-slimpro-mboxITi`i2cslimproapm,xgene-slimpro-i2cuhwmonslimproapm,xgene-slimpro-hwmonuserial@1c020000okay ns16550aI|  Lserial@1c021000 disabled ns16550aI|  Mserial@1c022000 disabled ns16550aI |  Nserial@1c023000 disabled ns16550aI0|  Ommc@1c000000arasan,sdhci-4.9aI IQclk_xinclk_ahbokaygpio0@1701c000apm,xgene-gpioI@gpio@1c024000snps,dw-apb-gpioI@+gpio-controller@0snps,dw-apb-gpio-port Ii2c@10512000 disabled+snps,designware-i2cIQ  Dphy@1f21a000apm,xgene-phyI! disabled  phy@1f22a000apm,xgene-phyI"okay  phy@1f23a000apm,xgene-phyI#okay  !sata@1a000000apm,xgene-ahciPI!!!!p Q disabled sata-physata@1a400000apm,xgene-ahciPI@""""p Qokay sata-physata@1a800000apm,xgene-ahci@I### Qokay ! sata-phyusb@19000000 disabled snps,dwc3I Qhostusb@19800000 disabled snps,dwc3I Qhostgpio@17001000apm,xgene-gpio-sbIH()*+,- *rtc@10510000apm,xgene-rtcIQ F"mdio@17020000apm,xgene-mdio-rgmii+I#phy@3I%phy@4I'phy@5I(ethernet@17020000apm,xgene-enetokay0I:enet_csrring_csrring_cmd <Q#rgmii-$%mdioapm,xgene-mdio+menetphy@3ethernet-phy-id001c.c915I$ethernet@1f210000apm,xgene1-sgenetokay0I! :enet_csrring_csrring_cmdQ&sgmii-'ethernet@1f210030apm,xgene1-sgenetokay0I!0 :enet_csrring_csrring_cmd8Qsgmii-(ethernet@1f610000apm,xgene1-xgenetokay0Ia`:enet_csrring_csrring_cmd``abcdefg@Q)xgmii H* ethernet@1f620000apm,xgene1-xgenet disabled0Ib`:enet_csrring_csrring_cmdlm8Q+xgmiirng@10520000apm,xgene-rngIR A,dma@1f270000apm,xgene-storm-dma=dma@I' @T<Q-chosenmemory@100000000=memoryIgpio-keys gpio-keysbuttonTPOWERZte *poweroff_mbox@10548000sysconIT0.poweroff@10548010syscon-poweroff.L~ compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregenable-methodcpu-release-addrnext-level-cachecache-levelcache-unifiedphandle#interrupt-cellsinterrupt-controllerinterrupts#clock-cellsclock-frequencyclock-output-namesrangesdma-rangesclocksclock-namesclock-multclock-divreg-namesdivider-offsetdivider-widthdivider-shiftcsr-offsetcsr-maskenable-offsetenable-maskstatusmsi-controllerregmapregmap-cswregmap-mcbaregmap-mcbbregmap-efuseregmap-rbmemory-controllerpmd-controllerenable-bit-indexbus-rangeinterrupt-map-maskinterrupt-mapdma-coherentmsi-parent#mbox-cellsmboxesreg-shiftno-1-8-vgpio-controller#gpio-cellssnps,nr-gpiosbus_num#phy-cellsapm,tx-boost-gainapm,tx-eye-tuningphysphy-namesdr_modelocal-mac-addressphy-connection-typephy-handleport-idchannelrxlos-gpioslabellinux,codelinux,input-type