H(fsl,lx2162a-qdsfsl,lx2160a +7NXP Layerscape LX2162AQDSaliases=/soc/timer@2800000B/soc/crypto@8000000I/soc/esdhc@2140000N/soc/esdhc@2150000S/soc/serial@21c0000cpus+cpu@0[cpuarm,cortex-a72gpsciu y@@cpu@1[cpuarm,cortex-a72gpsciu y@@cpu@100[cpuarm,cortex-a72gpsciu y@@cpu@101[cpuarm,cortex-a72gpsciu y@@cpu@200[cpuarm,cortex-a72gpsciu y@@cpu@201[cpuarm,cortex-a72gpsciu y@@cpu@300[cpuarm,cortex-a72gpsciu y@@cpu@301[cpuarm,cortex-a72gpsciu y@@cpu@400[cpuarm,cortex-a72gpsciu y@@cpu@401[cpuarm,cortex-a72gpsciu y@@cpu@500[cpuarm,cortex-a72gpsciu y@@ cpu@501[cpuarm,cortex-a72gpsciu y@@ cpu@600[cpuarm,cortex-a72gpsciu y@@ cpu@601[cpuarm,cortex-a72gpsciu y@@ cpu@700[cpuarm,cortex-a72gpsciu y@@ cpu@701[cpuarm,cortex-a72gpsciu y@@ l2-cache0cache@l2-cache1cache@l2-cache2cache@l2-cache3cache@l2-cache4cache@l2-cache5cache@ l2-cache6cache@ l2-cache7cache@ cpu-pw15arm,idle-state*PW15:Qbrpinterrupt-controller@6000000 arm,gic-v3Pu  +  msi-controller@6020000arm,gic-v3-itsu4timerarm,armv8-timer0   pmuarm,cortex-a72-pmu psci arm,psci-0.2nsmcmemory@80000000[memoryumemory-controller@1080000fsl,qoriq-memory-controlleru memory-controller@1090000fsl,qoriq-memory-controlleru  sysclk fixed-clocksysclkthermal-zonescluster6-7, tripscluster6-7-alert<LHbpassive cluster6-7-crit<sH bcriticalcooling-mapsmap0S Xddr-cluster5, tripsddr-cluster5-alert<LHbpassiveddr-cluster5-crit<sH bcriticalwriop, tripswriop-alert<LHbpassivewriop-crit<sH bcriticaldce-qbman-hsio2, tripsdce-qbman-alert<LHbpassivedce-qbman-crit<sH bcriticalccn-dpaa-tbu, tripsccn-dpaa-alert<LHbpassiveccn-dpaa-crit<sH bcriticalcluster4-hsio3, tripsclust4-hsio3-alert<LHbpassiveclust4-hsio3-crit<sH bcriticalcluster2-3, tripscluster2-3-alert<LHbpassivecluster2-3-crit<sH bcriticalsoc simple-bus+gphy@1ea0000 fsl,lynx-28gu0rphy@1eb0000 fsl,lynx-28gu0r }disabledcrypto@8000000fsl,sec-v5.0fsl,sec-v4.0 +u }okayjr@10000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu jr@20000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu jr@30000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu jr@40000,fsl,sec-v5.0-job-ringfsl,sec-v4.0-job-ringu clock-controller@1300000fsl,lx2160a-clockgenu0 ysyscon@1e00000fsl,lx2160a-dcfgsysconuefuse@1e80000fsl,ls1028a-sfpu ysfpsyscon@1f70000fsl,lx2160a-iscsysconu+interrupt-controller@14&fsl,lx2160a-extirqfsl,ls1088a-extirqu       #tmu@1f80000fsl,qoriq-tmuu ʀ}5T i2c@2000000fsl,vf610-i2c+u "i2c y defaultgpio  $!}okayfpga@662fsl,lx2160aqds-fpgafsl,fpga-qixis-i2csimple-mfdufmux-controllerreg-mux.ATTJi2c-mux@77 nxp,pca9547uw+i2c@2+upower-monitor@40 ti,ina220u@Opower-monitor@41 ti,ina220uAOi2c@3+utemperature-sensor@4c nxp,sa56004uL^"rtc@51 nxp,pcf2129uQ i# i2c@2010000fsl,vf610-i2c+u "i2c y defaultgpio$% $! }disabledi2c@2020000fsl,vf610-i2c+u #i2c y defaultgpio&' $! }disabledi2c@2030000fsl,vf610-i2c+u #i2c y defaultgpio() $! }disabledi2c@2040000fsl,vf610-i2c+u Ji2c y defaultgpio*+ $! }disabledi2c@2050000fsl,vf610-i2c+u Ji2c y defaultgpio,- $! }disabledi2c@2060000fsl,vf610-i2c+u Ki2c y defaultgpio./ $0 }disabledi2c@2070000fsl,vf610-i2c+u Ki2c y defaultgpio12 $0 }disabledspi@20c0000nxp,lx2160a-fspi+ u  }fspi_basefspi_mmap y fspi_enfspi}okayflash@0+jedec,spi-noruspi@2100000"fsl,lx2160a-dspifsl,ls2085a-dspi+u  ydspi}okayflash@0+jedec,spi-noruB@spi@2110000"fsl,lx2160a-dspifsl,ls2085a-dspi+u  ydspi}okayflash@0+jedec,spi-noruB@spi@2120000"fsl,lx2160a-dspifsl,ls2085a-dspi+u  ydspi}okayflash@0+jedec,spi-noruB@esdhc@2140000 fsl,esdhcu  y }okay!.esdhc@2150000 fsl,esdhcu ? y ;}okayETcan@2180000fsl,lx2160ar1-flexcanu yipgperc}okaycan@2190000fsl,lx2160ar1-flexcanu yipgperc}okayserial@21c0000arm,pl011arm,primecellyuartclkapb_pclku  }okayserial@21d0000arm,pl011arm,primecellyuartclkapb_pclku !}okayserial@21e0000arm,pl011arm,primecellyuartclkapb_pclku H }disabledserial@21f0000arm,pl011arm,primecellyuartclkapb_pclku I }disabledgpio@2300000fsl,qoriq-gpiou0 $r!gpio@2310000fsl,qoriq-gpiou1 $r0gpio@2320000fsl,qoriq-gpiou2 %rgpio@2330000fsl,qoriq-gpiou3 %rwatchdog@23a0000arm,sbsa-gwdt u:9 ;power-controller@1e34040%fsl,lx2160a-rcpmfsl,qoriq-rcpm-2.1+u@@3timer@2800000fsl,lx2160a-ftm-alarmu 3@ ,usb@3100000 snps,dwc3u Phost }okayusb@3110000 snps,dwc3u Qhost  }disabledsata@3200000fsl,lx2160a-ahci u  }ahcisata-ecc  y}okaysata@3210000fsl,lx2160a-ahci u! }ahcisata-ecc  y}okaysata@3220000fsl,lx2160a-ahci u" }ahcisata-ecc a y}okaysata@3230000fsl,lx2160a-ahci u# }ahcisata-ecc d y}okaypcie@3400000fsl,lx2160a-pcie u@ }csr_axi_slaveconfig_axi_slave$lll 7aerpmeintr+[pciGQ[@@@e4mnopp5 }disabledpcie@3500000fsl,lx2160a-pcie uP }csr_axi_slaveconfig_axi_slave$qqq 7aerpmeintr+[pciGQ[@@@e4rstup5 }disabledpcie@3600000fsl,lx2160a-pcie u` }csr_axi_slaveconfig_axi_slave$vvv 7aerpmeintr+[pciGQ[@@@e4wxyzp5 }disabledpcie@3700000fsl,lx2160a-pcie up }csr_axi_slaveconfig_axi_slave${{{ 7aerpmeintr+[pciGQ[@@@e4|}~p5 }disabledpcie@3800000fsl,lx2160a-pcie u }csr_axi_slaveconfig_axi_slave$ 7aerpmeintr+[pciGQ[@@@e4p5 }disabledpcie@3900000fsl,lx2160a-pcie u }csr_axi_slaveconfig_axi_slave$ggg 7aerpmeintr+[pciGQ[@@@e4hijkp5 }disablediommu@5000000 arm,mmu-500uz 5console@8340020fsl,dpaa2-consoleu4 ptp-timer@8b95000fsl,dpaa2-ptpuP ymdio@8b96000fsl,fman-memac-mdiou` Z+&% y}okayKmdio@8b97000fsl,fman-memac-mdioup [+&% y}okayLmdio@8c07000fsl,fman-memac-mdioup+ }disabledethernet-phy@0u6mdio@8c0b000fsl,fman-memac-mdiou+ }disabledethernet-phy@0u7mdio@8c0f000fsl,fman-memac-mdiou+ }disabledethernet-phy@0u8mdio@8c13000fsl,fman-memac-mdiou0+ }disabledethernet-phy@0u9mdio@8c17000fsl,fman-memac-mdioup+ }disabledethernet-phy@0u:mdio@8c1b000fsl,fman-memac-mdiou+ }disabledethernet-phy@0u;mdio@8c1f000fsl,fman-memac-mdiou+ }disabledethernet-phy@0u<mdio@8c23000fsl,fman-memac-mdiou0+ }disabledethernet-phy@0u=mdio@8c27000fsl,fman-memac-mdioup+ }disabledethernet-phy@0u>mdio@8c2b000fsl,fman-memac-mdiou°+ }disabledethernet-phy@0u?mdio@8c2f000fsl,fman-memac-mdiou+ }disabledethernet-phy@0u@mdio@8c33000fsl,fman-memac-mdiou0+ }disabledethernet-phy@0uAmdio@8c37000fsl,fman-memac-mdioup+ }disabledethernet-phy@0uBmdio@8c3b000fsl,fman-memac-mdiouð+ }disabledethernet-phy@0uCmdio@8c3f000fsl,fman-memac-mdiou+ }disabledethernet-phy@0uDmdio@8c43000fsl,fman-memac-mdiou0+ }disabledethernet-phy@0uEmdio@8c47000fsl,fman-memac-mdioup+ }disabledethernet-phy@0uFmdio@8c4b000fsl,fman-memac-mdiouİ+ }disabledethernet-phy@0uHpinmux@70010012cpinctrl-singleu, + i2c1-scl-pins $i2c1-scl-gpio-pins %i2c2-scl-pins 8&i2c2-scl-gpio-pins 8'i2c3-scl-pins (i2c3-scl-gpio-pins @)i2c4-scl-pins *i2c4-scl-gpio-pins +i2c5-scl-pins p,i2c5-scl-gpio-pins p-i2c6-scl-pins .i2c6-scl-gpio-pins /i2c7-scl-pins 1i2c7-scl-gpio-pins 2i2c0-scl-pins i2c0-scl-gpio-pins  fsl-mc@80c000000 fsl,qoriq-mc u @4e4p5+0 dpmacs+ethernet@1fsl,qoriq-mc-dpmacu6ethernet@2fsl,qoriq-mc-dpmacu7ethernet@3fsl,qoriq-mc-dpmacu8ethernet@4fsl,qoriq-mc-dpmacu9ethernet@5fsl,qoriq-mc-dpmacu:ethernet@6fsl,qoriq-mc-dpmacu;ethernet@7fsl,qoriq-mc-dpmacu<ethernet@8fsl,qoriq-mc-dpmacu=ethernet@9fsl,qoriq-mc-dpmacu >ethernet@afsl,qoriq-mc-dpmacu ?ethernet@bfsl,qoriq-mc-dpmacu @ethernet@cfsl,qoriq-mc-dpmacu Aethernet@dfsl,qoriq-mc-dpmacu Bethernet@efsl,qoriq-mc-dpmacuCethernet@ffsl,qoriq-mc-dpmacuDethernet@10fsl,qoriq-mc-dpmacuEethernet@11fsl,qoriq-mc-dpmacuFG )rgmii-idethernet@12fsl,qoriq-mc-dpmacuHI )rgmii-idfirmwareopteelinaro,optee-tznsmc}okaychosen=serial0:115200n8regulator-sb3v3regulator-fixedILTM4619-3.3VSBX2Zp2Z"mdio-mux-1mdio-mux-multiplexerJK+mdio@0u+ethernet-phy@1ethernet-phy-id001c.c916uGmdio@8u+ethernet-phy@2ethernet-phy-id001c.c916uImdio@18u+mdio@19u+mdio@1au+mdio@1bu+mdio@1cu+mdio@1du+mdio@1eu+mdio@1fu+mdio-mux-2mdio-mux-multiplexerJL+mdio@0u+mdio@1u+mdio@2u+mdio@3u+mdio@4u+mdio@5u+mdio@6u+mdio@7u+ compatibleinterrupt-parent#address-cells#size-cellsmodelrtc1cryptommc0mmc1serial0device_typeenable-methodregclocksd-cache-sized-cache-line-sized-cache-setsi-cache-sizei-cache-line-sizei-cache-setsnext-level-cachecpu-idle-states#cooling-cellsphandlecache-unifiedcache-levelidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-us#interrupt-cellsrangesinterrupt-controllerinterruptsmsi-controllerlittle-endian#clock-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicedma-ranges#phy-cellsstatusfsl,sec-eradma-coherentclock-namesinterrupt-mapinterrupt-map-maskfsl,tmu-rangefsl,tmu-calibration#thermal-sensor-cellspinctrl-namespinctrl-0pinctrl-1scl-gpios#mux-control-cellsmux-reg-masksshunt-resistorvcc-supplyinterrupts-extendedreg-namesm25p,fast-readspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthspi-num-chipselectsbus-numvoltage-rangessdhci,auto-cmd12sd-uhs-sdr104sd-uhs-sdr50sd-uhs-sdr25sd-uhs-sdr12broken-cdmmc-hs200-1_8vmmc-hs400-1_8vfsl,clk-sourcegpio-controller#gpio-cellstimeout-sec#fsl,rcpm-wakeup-cellsfsl,rcpm-wakeupdr_modesnps,quirk-frame-length-adjustmentusb3-lpm-capablesnps,dis_rxdet_inp3_quirksnps,incr-burst-type-adjustmentinterrupt-namesapio-winsppio-winsbus-rangemsi-parentiommu-map#iommu-cells#global-interruptsfsl,extts-fifopinctrl-single,bit-per-muxpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,bitspcs-handlephy-handlephy-connection-typestdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltmux-controlsmdio-parent-buseee-broken-1000t