ڇ8L( ; ',TQ-Systems i.MX8DXP TQMa8XDP on MBa8Xx;2tq,imx8dxp-tqma8xdp-mba8xxtq,imx8dxp-tqma8xdpfsl,imx8dxpaliases =/bus@5b000000/ethernet@5b040000 G/bus@5b000000/ethernet@5b050000Q/bus@5d000000/gpio@5d080000W/bus@5d000000/gpio@5d090000]/bus@5d000000/gpio@5d0a0000c/bus@5d000000/gpio@5d0b0000i/bus@5d000000/gpio@5d0c0000o/bus@5d000000/gpio@5d0d0000u/bus@5d000000/gpio@5d0e0000{/bus@5d000000/gpio@5d0f0000/bus@5a000000/i2c@5a800000/bus@5a000000/i2c@5a810000/bus@5a000000/i2c@5a820000/bus@5a000000/i2c@5a830000/bus@5b000000/mmc@5b010000/bus@5b000000/mmc@5b020000/bus@5b000000/mmc@5b030000/bus@5d000000/mailbox@5d1b0000/bus@5d000000/mailbox@5d1c0000/bus@5d000000/mailbox@5d1d0000/bus@5d000000/mailbox@5d1e0000/bus@5d000000/mailbox@5d1f0000/bus@5a000000/serial@5a060000/bus@5a000000/serial@5a070000/bus@5a000000/serial@5a080000/bus@5a000000/serial@5a090000 /vpu@2c000000/vpu-core@2d080000 /vpu@2c000000/vpu-core@2d090000"/bus@5a000000/i2c@5a810000/rtc@51/system-controller/rtccpus cpu@0cpu2arm,cortex-a35psci!@3@M@_l }cpu@1cpu2arm,cortex-a35psci!@3@M@_l } l2-cache02cache#@5opp-table2operating-points-v2opp-9000000005B@Iopp-1200000000GIinterrupt-controller@51a00000 2arm,gic-v3 QQ  , reserved-memory 7decoder-boot@84000000>encoder-boot@86000000 >decoder-rpc@92000000>dsp@92400000@> Edisabled*encoder-rpc@94400000@p>linux,cma2shared-dma-poolL U0bpmu2arm,cortex-a35-pmu ,psci 2arm,psci-1.0 smcsystem-controller 2fsl,imx-scu ttx0rx0gip3$power-controller2fsl,imx8qxp-scu-pdfsl,scu-pd clock-controller2fsl,imx8qxp-clkfsl,scu-clkpinctrl2fsl,imx8qxp-iomuxcflexspi0grpMMMMMMMMMMMMMMMlpi2c1grpv!w!Xlpi2c1gpiogrpv!w!Yusdhc1grp A ! ! ! !!!!!!Aousdhc1-100mhzgrp @      @pusdhc1-200mhzgrp @      @qadc0grp0d`c`f`e`eadmapwmgrp `!Tbllvdsgrp y!can0grpo!p!hcan1grpr!q!iethphy0grp@@|ethphy3grp@@~fec1grp5A4A&@%@'@(@)@*@-@,@.@/@0@1@zfec2grp9@7@?@@@8@:@;@B@A@>@=@<@gpiobuttonsgrpg h lpi2c2grpz!{!`lpi2c2gpiogrpz!{!alpuart1grpN M Olpuart3grpm n Rlsgpio3grp !pca9538grp  ]pcieagrp$AAAregpcie1v5grp W!regpcie3v3grp X!sai1grp<LAiAjAkAlA$spi1grp<SARAUAT!V!Espi2grp0\A[AZAY!Hspi3grp<EAGAFAH!I!Kusbotg1grp!!musdhc2gpiogrp!!tusdhc2grpTA! !!!"!#!!susdhc2-100mhzgrpT@ ! " #  uusdhc2-200mhzgrpT@ ! " #  vocotp2fsl,imx8qxp-scu-ocotp keys"2fsl,imx8qxp-sc-keyfsl,imx-sc-keyt Edisabledrtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdt<thermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermaltimer2arm,armv8-timer0,   clock-dummy 2fixed-clock clk_dummyclock-xtal32k 2fixed-clock xtal_32KHzclock-xtal24m 2fixed-clockn6 xtal_24MHzthermal-zonescpu0-thermal(ctripstrip08sDpassivetrip18D criticalcooling-mapsmap0OT pmic-thermal(tripstrip08Dpassive trip18HD criticalcooling-mapsmap0O T clock-img-ipg 2fixed-clock  img_ipg_clkbus@58000000 2simple-bus 7XXjpegdec@58400000X@ ,5} c s   2nxp,imx8qxp-jpgdecjpegenc@58450000XE ,1} c s   2nxp,imx8qxp-jpgencclock-controller@585d00002fsl,imx8qxp-lpcgX]}0img_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clk  clock-controller@585f00002fsl,imx8qxp-lpcgX_}0img_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clk  vpu@2c000000 7,,, Eokay2nxp,imx8qxp-vpumailbox@2d0000002fsl,imx6sx-mu- , Eokaymailbox@2d0200002fsl,imx6sx-mu- , Eokayvpu-core@2d080000-2nxp,imx8q-vpu-decoder  ttx0tx1rx$Eokayvpu-core@2d090000-2nxp,imx8q-vpu-encoder  ttx0tx1rx$Eokayclock-cm40-ipg 2fixed-clock) cm40_ipg_clkbus@34000000 2simple-bus 744serial@372200002fsl,imx8qxp-lpuart7",} ipgbaud csn6  Edisabledi2c@37230000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c7#, }peripg c sn6   Edisabledintmux@374000002fsl,imx-intmux7@`,}ipg ! Edisabledclock-controller@376200002fsl,imx8qxp-lpcg7b}*cm40_lpcg_uart_clkcm40_lpcg_uart_ipg_clk clock-controller@376300002fsl,imx8qxp-lpcg7c} (cm40_lpcg_i2c_clkcm40_lpcg_i2c_ipg_clk  bus@53000000 2simple-bus 7SSgpu@53100000 2vivante,gcS ,@} coreshadercs)'2 clock-audio-ipg 2fixed-clock'audio_ipg_clk!clock-ext-aud-mclk0 2fixed-clockext_aud_mclk05clock-ext-aud-mclk1 2fixed-clockext_aud_mclk16clock-esai0-rx 2fixed-clock esai0_rx_clk7clock-esai0-rx-hf 2fixed-clockesai0_rx_hf_clk8clock-esai0-tx 2fixed-clock esai0_tx_clk9clock-esai0-tx-hf 2fixed-clockesai0_tx_hf_clk:clock-spdif0-rx 2fixed-clock spdif0_rx;clock-sai0-rx-bclk 2fixed-clock sai0_rx_bclk<clock-sai0-tx-bclk 2fixed-clock sai0_tx_bclk=clock-sai1-rx-bclk 2fixed-clock sai1_rx_bclk>clock-sai1-tx-bclk 2fixed-clock sai1_tx_bclk?clock-sai2-rx-bclk 2fixed-clock sai2_rx_bclk@clock-sai3-rx-bclk 2fixed-clock sai3_rx_bclkAclock-sai4-rx-bclk 2fixed-clock sai4_rx_bclkBbus@59000000 2simple-bus 7YYasrc@590000002fsl,imx8qm-asrcY ,td}memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxc@  Edisabledesai@590100002fsl,imx8qm-esaiY ,}coreextalfsysspba rxtx  Edisabledspdif@590200002fsl,imx8qm-spdifY,0}  !:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba  rxtx  Edisabledsai@590400002fsl,imx8qm-saiY ,:}""busmclk0mclk1mclk2mclk3rxtx    > Edisabledsai@590500002fsl,imx8qm-saiY ,<}##busmclk0mclk1mclk2mclk3rxtx  ?Eokay,cEEE#s. default$sai@590600002fsl,imx8qm-saiY ,>}%%busmclk0mclk1mclk2mclk3rx @ Edisabledsai@590700002fsl,imx8qm-saiY ,C}&&busmclk0mclk1mclk2mclk3rx  Edisableddma-controller@591f00002fsl,imx8qm-edmaY$/<\  ,vwxyz{;;==?D @ A B C D E F G H I J K L M N O P Q R S T U V Wclock-controller@594000002fsl,imx8qxp-lpcgY@}!asrc0_lpcg_ipg_clk clock-controller@594100002fsl,imx8qxp-lpcgYA }!(esai0_lpcg_extal_clkesai0_lpcg_ipg_clk clock-controller@594200002fsl,imx8qxp-lpcgYB }!%spdif0_lpcg_tx_clkspdif0_lpcg_gclkw  clock-controller@594400002fsl,imx8qxp-lpcgYD } !!sai0_lpcg_mclksai0_lpcg_ipg_clk >"clock-controller@594500002fsl,imx8qxp-lpcgYE } !!sai1_lpcg_mclksai1_lpcg_ipg_clk ?#clock-controller@594600002fsl,imx8qxp-lpcgYF }!!sai2_lpcg_mclksai2_lpcg_ipg_clk @%clock-controller@594700002fsl,imx8qxp-lpcgYG }!!sai3_lpcg_mclksai3_lpcg_ipg_clk &clock-controller@595800002fsl,imx8qxp-lpcgYX }!!! 4dsp_lpcg_adb_clkdsp_lpcg_ipg_clkdsp_lpcg_core_clk 'clock-controller@595900002fsl,imx8qxp-lpcgYY}!dsp_ram_lpcg_ipg_clk (dsp@596e80002fsl,imx8qxp-dspYn}'('ipgocramcore   ttxdb0txdb1rxdb0rxdb10))))* Edisabledasrc@598000002fsl,imx8qm-asrcY ,|d}++memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`,,,,,,rxarxbrxctxatxbtxc@  Edisabledsai@598200002fsl,imx8qm-saiY ,I}--busmclk0mclk1mclk2mclk3 ,, rxtx  Edisabled0sai@598300002fsl,imx8qm-saiY ,K}..busmclk0mclk1mclk2mclk3, tx  Edisabled1amix@598400002fsl,imx8qm-audmixY}/ipg M01 Edisabledmqs@598500002fsl,imx8qm-mqsY}22 mclkcore  Edisableddma-controller@599f00002fsl,imx8qm-edmaY $/ <,~JJLX l m n o p q r s t u v,clock-controller@59d000002fsl,imx8qxp-lpcgY }Eaud_rec_clk0_lpcg_clk E3clock-controller@59d100002fsl,imx8qxp-lpcgY }aud_rec_clk1_lpcg_clk 4clock-controller@59d200002fsl,imx8qxp-lpcgY }Eaud_pll_div_clk0_lpcg_clk Eclock-controller@59d300002fsl,imx8qxp-lpcgY }aud_pll_div_clk1_lpcg_clk clock-controller@59d500002fsl,imx8qxp-lpcgY}mclkout0_lpcg_clk [clock-controller@59d600002fsl,imx8qxp-lpcgY}mclkout1_lpcg_clk acm@59e000002fsl,imx8qxp-acmY     E     > ? @     X}3456789:;<=>?@ABaud_rec_clk0_lpcg_clkaud_rec_clk1_lpcg_clkaud_pll_div_clk0_lpcg_clkaud_pll_div_clk1_lpcg_clkext_aud_mclk0ext_aud_mclk1esai0_rx_clkesai0_rx_hf_clkesai0_tx_clkesai0_tx_hf_clkspdif0_rxsai0_rx_bclksai0_tx_bclksai1_rx_bclksai1_tx_bclksai2_rx_bclksai3_rx_bclksai4_rx_bclkclock-controller@59c000002fsl,imx8qxp-lpcgY}!asrc1_lpcg_ipg_clk +clock-controller@59c200002fsl,imx8qxp-lpcgY }!!sai4_lpcg_mclksai4_lpcg_ipg_clk -clock-controller@59c300002fsl,imx8qxp-lpcgY }!!sai5_lpcg_mclksai5_lpcg_ipg_clk .clock-controller@59c400002fsl,imx8qxp-lpcgY}!amix_lpcg_ipg_clk /clock-controller@59c500002fsl,imx8qxp-lpcgY }!!mqs0_lpcg_mclkmqs0_lpcg_ipg_clk 2clock-dma-ipg 2fixed-clock' dma_ipg_clkUbus@5a000000 2simple-bus 7ZZspi@5a0000002fsl,imx7ulp-spiZ  ,P}CCperipg c5s 5 Edisabledspi@5a0100002fsl,imx7ulp-spiZ  ,Q}DDperipg c6s 6Eokay defaultERFFspi@5a0200002fsl,imx7ulp-spiZ  ,R}GGperipg c7s 7Eokay defaultH RIspi@5a0300002fsl,imx7ulp-spiZ  ,S}JJperipg c8s 8Eokay defaultK[ RFserial@5a060000Z ,Y}LL ipgbaud c9sĴ 9rxtx MM  Edisabled2fsl,imx8qxp-lpuartserial@5a070000Z ,Z}NN ipgbaud c:sĴ :rxtx M M Eokay2fsl,imx8qxp-lpuart defaultOserial@5a080000Z ,[}PP ipgbaud c;sĴ ;rxtx M M  Edisabled2fsl,imx8qxp-lpuartserial@5a090000Z  ,\}QQ ipgbaud c<sĴ <rxtx MMEokay2fsl,imx8qxp-lpuart defaultRpwm@5a1900002fsl,imx8qxp-pwmfsl,imx27-pwmZ ,}SSipgper csn6b  defaultTdma-controller@5a1f00002fsl,imx8qm-edmaZ$/,              Mclock-controller@5a4000002fsl,imx8qxp-lpcgZ@}5U spi0_lpcg_clkspi0_lpcg_ipg_clk 5Cclock-controller@5a4100002fsl,imx8qxp-lpcgZA}6U spi1_lpcg_clkspi1_lpcg_ipg_clk 6Dclock-controller@5a4200002fsl,imx8qxp-lpcgZB}7U spi2_lpcg_clkspi2_lpcg_ipg_clk 7Gclock-controller@5a4300002fsl,imx8qxp-lpcgZC}8U spi3_lpcg_clkspi3_lpcg_ipg_clk 8Jclock-controller@5a4600002fsl,imx8qxp-lpcgZF}9U'uart0_lpcg_baud_clkuart0_lpcg_ipg_clk 9Lclock-controller@5a4700002fsl,imx8qxp-lpcgZG}:U'uart1_lpcg_baud_clkuart1_lpcg_ipg_clk :Nclock-controller@5a4800002fsl,imx8qxp-lpcgZH};U'uart2_lpcg_baud_clkuart2_lpcg_ipg_clk ;Pclock-controller@5a4900002fsl,imx8qxp-lpcgZI}<U'uart3_lpcg_baud_clkuart3_lpcg_ipg_clk <Qclock-controller@5a5900002fsl,imx8qxp-lpcgZY}U(adma_pwm_lpcg_clkadma_pwm_lpcg_ipg_clk Si2c@5a800000Z@ ,}VVperipg c`sn6 ` Edisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a810000Z@ ,}WWperipg casn6 aEokay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c   defaultgpioXmY wI Itemperature-sensor@1b2nxp,se97bjedec,jc-42.4-temprtc@512nxp,pcf85063aQXeeprom@532nxp,se97batmel,24c02SZeeprom@57 2atmel,24c64W Zaudio-codec@182ti,tlv320aic32x4}[mclk\Ztemperature-sensor@1c2nxp,se97bjedec,jc-42.4-tempeeprom@542nxp,se97batmel,24c02TZgpio@70 2nxp,pca9538p default]^,\3LED_ALED_BDSI_ENUSB_RESET#V_12V_ENPCIE_DIS#i2c@5a820000Z@ ,}__peripg cbsn6 bEokay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c  defaultgpio`ma wI bi2c@5a830000Z@ ,}ccperipg ccsn6 c Edisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cadc@5a8800002nxp,imx8qxp-adcZ ,}ddperipg cesn6 eEokay defaulte\adc@5a8900002nxp,imx8qxp-adcZ ,}ffperipg cfsn6 f Edisabledcan@5a8d00002fsl,imx8qm-flexcanZ ,}ggipgper cisbZ i#2Eokay defaulth@Zcan@5a8e00002fsl,imx8qm-flexcanZ ,}ggipgper cisbZ j#2Eokay defaulti@Zcan@5a8f00002fsl,imx8qm-flexcanZ ,}ggipgper cisbZ k#2 Edisableddma-controller@5a9f00002fsl,imx8qm-edmaZ $/`,@        clock-controller@5ac000002fsl,imx8qxp-lpcgZ}`U i2c0_lpcg_clki2c0_lpcg_ipg_clk `Vclock-controller@5ac100002fsl,imx8qxp-lpcgZ}aU i2c1_lpcg_clki2c1_lpcg_ipg_clk aWclock-controller@5ac200002fsl,imx8qxp-lpcgZ}bU i2c2_lpcg_clki2c2_lpcg_ipg_clk b_clock-controller@5ac300002fsl,imx8qxp-lpcgZ}cU i2c3_lpcg_clki2c3_lpcg_ipg_clk ccclock-controller@5ac800002fsl,imx8qxp-lpcgZ}eU adc0_lpcg_clkadc0_lpcg_ipg_clk edclock-controller@5ac900002fsl,imx8qxp-lpcgZ}fU adc1_lpcg_clkadc1_lpcg_ipg_clk ffclock-controller@5acd00002fsl,imx8qxp-lpcgZ}iUU 5can0_lpcg_pe_clkcan0_lpcg_ipg_clkcan0_lpcg_chi_clk igclock-conn-axi 2fixed-clockCU conn_axi_clkclock-conn-ahb 2fixed-clock ! conn_ahb_clkclock-conn-ipg 2fixed-clock conn_ipg_clkbus@5b000000 2simple-bus 7[[usb@5b0d0000-2fsl,imx7ulp-usbfsl,imx6ul-usbfsl,imx27-usb[  , OjZk}lfw Eokay defaultmotgusbmisc@5b0d020082fsl,imx7ulp-usbmiscfsl,imx7d-usbmiscfsl,imx6q-usbmisc[ kusbphy@5b1000002fsl,imx7ulp-usbphy[}l Eokayjmmc@5b010000 ,[}nnn ipgahbper Eokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc" defaultstate_100mhzstate_200mhzompq \Z%/=Emmc@5b020000 ,[}rrr ipgahbper K`Eokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc" defaultstate_100mhzstate_200mhzstmutvt% p^ y^w=mmc@5b030000 ,[}xxx ipgahbper  Edisabled"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcethernet@5b040000[0, }yyy yipgahbenet_clk_refptpcs沀sY@ Eokay.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fec defaultz rgmii-id{mdio ethernet-phy@02ethernet-phy-ieee802.3-c22 default|  2}> NP`},{ethernet-phy@32ethernet-phy-ieee802.3-c22 default~  2}> NP`},ethernet@5b050000[0, } ipgahbenet_clk_refptpcs沀sY@ Eokay.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fec default rgmii-idusb@5b1100002fsl,imx8qm-usb3[ 7(}lpmbusaclkipgcore cs沀 Eokayusb@5b120000 2cdns,usb3[[[ votgxhcidev0,hostperipheralotgwakeupcdns3,usb3-phyEokayhostusb-phy@5b1600002nxp,salvo-phy[}salvo_phy_clk Eokayclock-controller@5b2000002fsl,imx8qxp-lpcg[ } 9sdhc0_lpcg_per_clksdhc0_lpcg_ipg_clksdhc0_lpcg_ahb_clk nclock-controller@5b2100002fsl,imx8qxp-lpcg[!} 9sdhc1_lpcg_per_clksdhc1_lpcg_ipg_clksdhc1_lpcg_ahb_clk rclock-controller@5b2200002fsl,imx8qxp-lpcg["} 9sdhc2_lpcg_per_clksdhc2_lpcg_ipg_clksdhc2_lpcg_ahb_clk xclock-controller@5b2300002fsl,imx8qxp-lpcg[#0} enet0_lpcg_timer_clkenet0_lpcg_txc_sampling_clkenet0_lpcg_ahb_clkenet0_lpcg_rgmii_txc_clkenet0_lpcg_ipg_clkenet0_lpcg_ipg_s_clk yclock-controller@5b2400002fsl,imx8qxp-lpcg[$0} enet1_lpcg_timer_clkenet1_lpcg_txc_sampling_clkenet1_lpcg_ahb_clkenet1_lpcg_rgmii_txc_clkenet1_lpcg_ipg_clkenet1_lpcg_ipg_s_clk clock-controller@5b2700002fsl,imx8qxp-lpcg['}"usboh3_ahb_clkusboh3_phy_ipg_clk lclock-controller@5b2800002fsl,imx8qxp-lpcg[(0}Musb3_app_clkusb3_lpm_clkusb3_ipg_clkusb3_core_pclkusb3_phy_clkusb3_aclk bus@5c000000 2simple-bus 7\\ddr-pmu@5c0200002fsl,imx8-ddr-pmu\ ,clock-lsio-bus 2fixed-clock lsio_bus_clkbus@5d000000 2simple-bus  7]]pwm@5d0000002fsl,imx27-pwm]ipgper} csn6b ,^ Edisabledpwm@5d0100002fsl,imx27-pwm]ipgper} csn6b ,_ Edisabledpwm@5d0200002fsl,imx27-pwm]ipgper} csn6b ,` Edisabledpwm@5d0300002fsl,imx27-pwm]ipgper} csn6b ,a Edisabledgpio@5d080000] ,  2fsl,imx8qxp-gpiofsl,imx35-gpioP8 EKPRFgpio@5d090000]  ,  2fsl,imx8qxp-gpiofsl,imx35-gpio0Y ctIgpio@5d0a0000]  ,  2fsl,imx8qxp-gpiofsl,imx35-gpio0{~bgpio@5d0b0000]  ,  2fsl,imx8qxp-gpiofsl,imx35-gpio0  default%X4_15}gpio@5d0c0000]  ,  2fsl,imx8qxp-gpiofsl,imx35-gpio  %^gpio@5d0d0000]  ,  2fsl,imx8qxp-gpiofsl,imx35-gpio0(, 3gpio@5d0e0000] ,  2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0f0000] ,  2fsl,imx8qxp-gpiofsl,imx35-gpiospi@5d120000 2nxp,imx8qxp-fspi]vfspi_basefspi_mmap ,\} fspi_enfspi Eokay defaultflash@0 2jedec,spi-normailbox@5d1b0000] , Edisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1c0000] ,-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1d0000] , Edisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1e0000] , Edisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1f0000] , Edisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d200000]  ,  Edisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d210000]! ,  Edisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d280000]( , 2fsl,imx8qxp-mufsl,imx6sx-mu)clock-controller@5d4000002fsl,imx8qxp-lpcg]@4}hpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clk clock-controller@5d4100002fsl,imx8qxp-lpcg]A4}hpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clk clock-controller@5d4200002fsl,imx8qxp-lpcg]B4}hpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clk clock-controller@5d4300002fsl,imx8qxp-lpcg]C4}hpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clk clock-controller@5d4400002fsl,imx8qxp-lpcg]D4}hpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clk clock-controller@5d4500002fsl,imx8qxp-lpcg]E4}hpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clk clock-controller@5d4600002fsl,imx8qxp-lpcg]F4}hpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clk clock-controller@5d4700002fsl,imx8qxp-lpcg]G4}hpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clk memory@80000000memory@regulator-1v82regulator-fixedV_1V8w@(w@\regulator-3v32regulator-fixedV_3V32Z(2ZZadc 2iio-hwmon @backlight-lvds2pwm-backlight defaultLLK@ Q @c| I Edisabledchosen/bus@5a000000/serial@5a070000gpio-keys 2gpio-keys defaultswitch-aswitcha UI switch-bswitchb UIgpio-leds 2gpio-ledsled1status U default-onled2 heartbeat U heartbeatregulator-12v02regulator-fixedV_12V( regulator-pcie-1v52regulator-fixedMBA8XX_PCIE_1V5 default`(` Fregulator-pcie-3v32regulator-fixedMBA8XX_PCIE_3V3 default2Z(2Z F regulator-usdhc2-vmmc2regulator-fixed V_3V3_MB2Z(2Zwsound2fsl,imx-audio-tlv320aic32x4,tqm-tlv320aic32  , interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7i2c0i2c1i2c2i2c3mmc0mmc1mmc2mu0mu1mu2mu3mu4serial0serial1serial2serial3vpu-core0vpu-core1rtc0rtc1device_typeregenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksoperating-points-v2#cooling-cellsphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapstatusreusablealloc-rangeslinux,cma-defaultmbox-namesmboxes#power-domain-cells#clock-cellsfsl,pinslinux,keycodestimeout-sec#thermal-sensor-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceassigned-clocksassigned-clock-ratespower-domainsslotclock-indices#mbox-cellsmemory-regionclock-namesdmasdma-namesfsl,asrc-ratefsl,asrc-widthfsl,asrc-clk-mappinctrl-namespinctrl-0#dma-cellsdma-channelsdma-channel-maskdaiscs-gpiosnum-cs#pwm-cellspinctrl-1scl-gpiossda-gpiosquartz-load-femtofaradspagesizeread-onlyvcc-supplyiov-supplyldoin-supplygpio-controller#gpio-cellsgpio-line-names#io-channel-cellsvref-supplyfsl,clk-sourcefsl,scu-indexxceiver-supplyfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordsrp-disablehnp-disableadp-disablepower-active-highover-current-active-lowdr_mode#index-cellspinctrl-2vqmmc-supplyvmmc-supplybus-widthnon-removableno-sdiono-sdfsl,tuning-start-tapfsl,tuning-stepcd-gpioswp-gpiosno-1-8-vno-mmcfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handleti,rx-internal-delayti,tx-internal-delayti,fifo-depthti,dp83867-rxctrl-strap-quirkti,clk-output-selreset-gpiosreset-assert-usreset-deassert-usenet-phy-lane-no-swapreg-namesinterrupt-namesphysphy-namescdns,on-chip-buff-size#phy-cellsgpio-rangesspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthregulator-nameregulator-min-microvoltregulator-max-microvoltio-channelspwmsbrightness-levelsdefault-brightness-levelpower-supplyenable-gpiosstdout-pathautorepeatlabellinux,codecolorfunctionlinux,default-triggergpioenable-active-highstartup-delay-usregulator-always-onaudio-codecssi-controller