'8([ .,Variscite VAR-SOM-MX8M-PLUS on Symphony-BoardD2variscite,var-som-mx8mp-symphonyvariscite,var-som-mx8mpfsl,imx8mpaliases&=/soc@0/bus@30800000/ethernet@30be0000&G/soc@0/bus@30800000/ethernet@30bf0000"Q/soc@0/bus@30000000/gpio@30200000"W/soc@0/bus@30000000/gpio@30210000"]/soc@0/bus@30000000/gpio@30220000"c/soc@0/bus@30000000/gpio@30230000"i/soc@0/bus@30000000/gpio@30240000!o/soc@0/bus@30800000/i2c@30a20000!t/soc@0/bus@30800000/i2c@30a30000!y/soc@0/bus@30800000/i2c@30a40000!~/soc@0/bus@30800000/i2c@30a50000!/soc@0/bus@30800000/i2c@30ad0000!/soc@0/bus@30800000/i2c@30ae0000!/soc@0/bus@30800000/mmc@30b40000!/soc@0/bus@30800000/mmc@30b50000!/soc@0/bus@30800000/mmc@30b600006/soc@0/bus@30800000/spba-bus@30800000/serial@308600006/soc@0/bus@30800000/spba-bus@30800000/serial@308900006/soc@0/bus@30800000/spba-bus@30800000/serial@30880000$/soc@0/bus@30800000/serial@30a60000!/soc@0/bus@30800000/spi@30bb0000cpus cpu@0cpu2arm,cortex-a53lpsci@ -@?L] ispeed_gradezcpu@1cpu2arm,cortex-a53lpsci@ -@?Lzcpu@2cpu2arm,cortex-a53lpsci@ -@?Lzcpu@3cpu2arm,cortex-a53lpsci@ -@?Lzl2-cache02cache@opp-table2operating-points-v2opp-1200000000G PI opp-1600000000_^~I opp-1800000000kIB@ I clock-osc-32k 2fixed-clock%5osc_32k!clock-osc-24m 2fixed-clock%n65osc_24m"clock-ext1 2fixed-clock%k@ 5clk_ext1#clock-ext2 2fixed-clock%k@ 5clk_ext2$clock-ext3 2fixed-clock%k@ 5clk_ext3%clock-ext4 2fixed-clock%k@ 5clk_ext4&funnel2arm,coresight-static-funnelin-ports port@0endpointHport@1endpointHport@2endpointH port@3endpointH out-portsportendpointH reserved-memory Xdsp@92400000@_ fdisabledhpmu2arm,cortex-a53-pmu mpsci 2arm,psci-1.0smcthermal-zonescpu-thermalx tripstrip0Lpassive trip1s criticalcooling-mapsmap0 0soc-thermalx tripstrip0Lpassivetrip1s criticalcooling-mapsmap00timer2arm,armv8-timer0m   %zsoc@02fsl,imx8mp-socsimple-bus X>]isoc_unique_idetm@28440000"2arm,coresight-etm4xarm,primecell(D] apb_pclkout-portsportendpointHetm@28540000"2arm,coresight-etm4xarm,primecell(T] apb_pclkout-portsportendpointHetm@28640000"2arm,coresight-etm4xarm,primecell(d] apb_pclkout-portsportendpointH etm@28740000"2arm,coresight-etm4xarm,primecell(t] apb_pclkout-portsportendpointH funnel@28c03000+2arm,coresight-dynamic-funnelarm,primecell(0] apb_pclkin-ports port@0endpointH port@1endpointport@2endpointout-portsportendpointHetf@28c04000 2arm,coresight-tmcarm,primecell(@] apb_pclkin-portsportendpointHout-portsportendpointHetr@28c06000 2arm,coresight-tmcarm,primecell(`] apb_pclkin-portsportendpointHbus@300000002fsl,aips-bussimple-bus0@ Xgpio@302000002fsl,imx8mp-gpiofsl,imx35-gpio0 m@A/@1gpio@302100002fsl,imx8mp-gpiofsl,imx35-gpio0!mBC/@#gpio@302200002fsl,imx8mp-gpiofsl,imx35-gpio0"mDE/ @8gpio@302300002fsl,imx8mp-gpiofsl,imx35-gpio0#mFG/@R jgpio@302400002fsl,imx8mp-gpiofsl,imx35-gpio0$mHI/@r.tmu@302600002fsl,imx8mp-tmu0&]icalibL watchdog@302800002fsl,imx8mp-wdtfsl,imx21-wdt0( mNfokaybdefaultpzwatchdog@302900002fsl,imx8mp-wdtfsl,imx21-wdt0) mO fdisabledwatchdog@302a00002fsl,imx8mp-wdtfsl,imx21-wdt0* m  fdisabledtimer@302d00002fsl,imx8mp-gptfsl,imx6dl-gpt0- m7ipgpertimer@302e00002fsl,imx8mp-gptfsl,imx6dl-gpt0. m6ipgpertimer@302f00002fsl,imx8mp-gptfsl,imx6dl-gpt0/ m5ipgperpinctrl@303300002fsl,imx8mp-iomuxc03i2c1grp0@@,i2c3grp0p@t@/pca9534grpP0pmicgrp8-uart2grp0(@,@*usdhc2-gpiogrpHL3usdhc2grp $(,042usdhc2-100mhzgrp $(,044usdhc2-200mhzgrp $(,045usdhc3grp$( h lpt| L$P(T,H07usdhc3-100mhzgrp$( h lpt| L$P(T,H08usdhc3-200mhzgrp$( h lpt| L$P(T,H09wdoggrp|syscon@303400002fsl,imx8mp-iomuxc-gprsyscon04+efuse@30350000)2fsl,imx8mp-ocotpfsl,imx8mm-ocotpsyscon05 unique-id@8speed-grade@10mac-address@90:mac-address@96;calib@264dclock-controller@30360000$2fsl,imx8mp-anatopfsl,imx8mm-anatop06snvs@30370000#2fsl,sec-v4.0-monsysconsimple-mfd07 snvs-rtc-lp2fsl,sec-v4.0-mon-rtc-lp 4m snvs-rtcsnvs-powerkey2fsl,sec-v4.0-pwrkey  m snvs-pwrkeyt fdisabledsnvs-lpgpr+2fsl,imx8mp-snvs-lpgprfsl,imx7d-snvs-lpgprclock-controller@303800002fsl,imx8mp-ccm08mUV!"#$%&4osc_32kosc_24mclk_ext1clk_ext2clk_ext3clk_ext4(B gh(8,A8@;/ereset-controller@303900002fsl,imx8mp-srcsyscon09 mYNgpc@303a00002fsl,imx8mp-gpc0: mW/pgc power-domain@0 Ipower-domain@1 Spower-domain@2 Qpower-domain@3 Rpower-domain@4 ij 2ij888 //dpower-domain@5 6lH88ׄ#F>power-domain@6 '_power-domain@7 fef88/ׄ'power-domain@8 (power-domain@9  4'^power-domain@10   Hpower-domain@11 ( apower-domain@12 (  bpower-domain@13 (  cpower-domain@14 cdc@3ek@Tpower-domain@15 Upower-domain@16 Jpower-domain@17 7 7@ePpower-domain@18 Kbus@304000002fsl,aips-bussimple-bus0@@ Xpwm@306600002fsl,imx8mp-pwmfsl,imx27-pwm0f mQipgper- fdisabledpwm@306700002fsl,imx8mp-pwmfsl,imx27-pwm0g mRipgper- fdisabledpwm@306800002fsl,imx8mp-pwmfsl,imx27-pwm0h mSipgper- fdisabledpwm@306900002fsl,imx8mp-pwmfsl,imx27-pwm0i mTipgper- fdisabledtimer@306a00002nxp,sysctr-timer0j m/"pertimer@306e00002fsl,imx8mp-gptfsl,imx6dl-gpt0n m3ipgpertimer@306f00002fsl,imx8mp-gptfsl,imx6dl-gpt0o m3ipgpertimer@307000002fsl,imx8mp-gptfsl,imx6dl-gpt0p m4ipgperbus@308000002fsl,aips-bussimple-bus0@ Xspba-bus@308000002fsl,spba-bussimple-bus0 Xspi@30820000 "2fsl,imx8mp-ecspifsl,imx6ul-ecspi0 mipgperĴ8 8))=rxtx fdisabledspi@30830000 "2fsl,imx8mp-ecspifsl,imx6ul-ecspi0 m ipgperĴ8 8))=rxtx fdisabledspi@30840000 "2fsl,imx8mp-ecspifsl,imx6ul-ecspi0 m!ipgperĴ8 8))=rxtx fdisabledserial@308600002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper 8))=rxtx fdisabledserial@308800002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper 8))=rxtx fdisabledserial@308900002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper 8))=rxtxfokaybdefaultp*can@308c00002fsl,imx8mp-flexcan0 mnipgpert0bZG V+ fdisabledcan@308d00002fsl,imx8mp-flexcan0 mnipgperu0bZG V+ fdisabledcrypto@30900000 2fsl,sec-v4.0 0 X0 m[kn aclkipgjr@10002fsl,sec-v4.0-job-ring mi fdisabledjr@20002fsl,sec-v4.0-job-ring  mjjr@30002fsl,sec-v4.0-job-ring0 mri2c@30a200002fsl,imx8mp-i2cfsl,imx21-i2c 0 m#fokay%bdefaultp,pmic@25 2nxp,pca9450c%bdefaultp-.mregulatorsBUCK1dBUCK1s '!` 5BUCK2dBUCK2s '!` 5~ PBUCK4dBUCK4s '3@BUCK5dBUCK5s '3@BUCK6dBUCK6s '3@LDO1dLDO1sj2ZLDO2dLDO2s 50LDO3dLDO3s 52ZLDO4dLDO4sw@w@LDO5dLDO5sw@2Zi2c@30a300002fsl,imx8mp-i2cfsl,imx21-i2c 0 m$ fdisabledi2c@30a400002fsl,imx8mp-i2cfsl,imx21-i2c 0 m%fokay%bdefaultp/gpio@20 2nxp,pca9534 bdefaultp01miusb3-sata-sel-hog $usb3_sata_seli2c@30a500002fsl,imx8mp-i2cfsl,imx21-i2c 0 m& fdisabledserial@30a600002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper 8))=rxtx fdisabledmailbox@30aa00002fsl,imx8mp-mufsl,imx6sx-mu0 mX.mailbox@30e600002fsl,imx8mp-mufsl,imx6sx-mu0 m. fdisabledgi2c@30ad00002fsl,imx8mp-i2cfsl,imx21-i2c 0 mL fdisabledi2c@30ae00002fsl,imx8mp-i2cfsl,imx21-i2c 0 mM fdisabledmmc@30b4000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 mn_ ipgahbper:O_ fdisabledmmc@30b5000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 mn_ ipgahbper:O_fokay"bdefaultstate_100mhzstate_200mhzp23i43s53 }16mmc@30b6000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 mn_ ipgahbper:O_fokay"bdefaultstate_100mhzstate_200mhzp7i8s9spi@30bb00002nxp,imx8mp-fspi0fspi_basefspi_mmap mk fspi_enfspiĴ  fdisableddma-controller@30bd0000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0 mkipgahbimx/sdma/sdma-imx7d.bin)ethernet@30be0000-2fsl,imx8mp-fecfsl,imx8mq-fecfsl,imx6sx-fec00mvwxy("ipgahbptpenet_clk_refenet_out ^ 6:;9sY@]: imac-address V+ fdisabledethernet@30bf0000'2nxp,imx8mp-dwmac-eqossnps,dwmac-5.10a0mmacirqeth_wake_irq stmmacethpclkptp_reftx^6:; sY@]; imac-address+ fdisabledbus@30c000002fsl,aips-bussimple-bus0@ Xspba-bus@30c000002fsl,spba-bussimple-bus0 Xsai@30c100002fsl,imx8mp-saifsl,imx8mq-sai0 (<<<<busmclk0mclk1mclk2mclk3 8===rxtx m_ fdisabledsai@30c200002fsl,imx8mp-saifsl,imx8mq-sai0 (<<<<busmclk0mclk1mclk2mclk3 8===rxtx m` fdisabledsai@30c300002fsl,imx8mp-saifsl,imx8mq-sai0 (<< < < busmclk0mclk1mclk2mclk3 8===rxtx m2 fdisabledsai@30c500002fsl,imx8mp-saifsl,imx8mq-sai0 (< < <<busmclk0mclk1mclk2mclk3 8== =rxtx mZ fdisabledsai@30c600002fsl,imx8mp-saifsl,imx8mq-sai0 (<<<<busmclk0mclk1mclk2mclk3 8= = =rxtx mZ fdisabledsai@30c800002fsl,imx8mp-saifsl,imx8mq-sai0 (<<<<busmclk0mclk1mclk2mclk3 8= = =rxtx mo fdisabledeasrc@30c90000"2fsl,imx8mp-easrcfsl,imx8mn-easrc0 mz<mem8========@=ctx0_rxctx0_txctx1_rxctx1_txctx2_rxctx2_txctx3_rxctx3_tximx/easrc/easrc-imx8mn.bin+@9 fdisabledaudio-controller@30ca00002fsl,imx8mp-micfil0 0mmn,-(<<6&')ipg_clkipg_clk_apppll8kpll11kclkext38==rx fdisabledaud2htx@30cb00002fsl,imx8mp-aud2htx0 m<!bus8==tx fdisabledxcvr@30cc00002fsl,imx8mp-xcvr 000 0ramregsrxfifotxfifo$m <<&<<#ipgphyspbapll_ipg 8===rxtxI< fdisableddma-controller@30e00000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0<ipgahb m"imx/sdma/sdma-imx7d.bindma-controller@30e10000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0<ipgahb mgimx/sdma/sdma-imx7d.bin=clock-controller@30e200002fsl,imx8mp-audio-blk-ctrl08{|}"ahbsai1sai2sai3sai5sai6sai7>p<interconnect@327000002fsl,imx8mp-nocfsl,imx8m-noc2pgPz?Lopp-table2operating-points-v2?opp-200000000 opp-1000000000;bus@32c000002fsl,aips-bussimple-bus2@ Xisi@32e000002fsl,imx8mp-isi2@m* axiapbd@@ fdisabledports port@0endpointHACport@1endpointHBDisp@32e100002fsl,imx8mp-isp2 mJ ispaclkhclk@d@ fdisabledports port@1isp@32e200002fsl,imx8mp-isp2 mK ispaclkhclk@d@ fdisabledports port@1dwe@32e300002nxp,imx8mp-dw1002 md axiahb@csi@32e40000*2fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi22 m%沀  pclkwrapphyaxi>@ fdisabledports port@0port@1endpointHCAcsi@32e50000*2fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi22 mP%沀  pclkwrapphyaxi>@ fdisabledports port@0port@1endpointHDBdsi@32e600002fsl,imx8mp-mipi-dsim2 bus_clksclk_mipib8 n6qn6 m@ fdisabledports port@0endpointHEFport@1endpointdisplay-controller@32e800002fsl,imx8mp-lcdif2 pixaxidisp_axi m@ fdisabledportendpointHFEdisplay-controller@32e900002fsl,imx8mp-lcdif2 m pixaxidisp_axi@ fdisabledportendpointHGMblk-ctrl@32ec0000!2fsl,imx8mp-media-blk-ctrlsyscon2 (HIIHHJHKKJFbusmipi-dsi1mipi-csi1lcdif1isimipi-csi2lcdif2ispdwemipi-dsi2LLLLLLLLL LL!LL"LL#L/lcdif-rdlcdif-wrisi0isi1isi2isp0isp1dwe@ &apbaxicam1cam2disp1disp2ispphy0ab98(A8((@e e= @bridge@5c2fsl,imx8mp-ldb\( ldblvdsIldb( fdisabledports port@0endpointHMGport@1endpointport@2endpointpcie-phy@32f000002fsl,imx8mp-pcie-phy2INNpciephyperstO fdisabled]blk-ctrl@32f10000 2fsl,imx8mp-hsio-blk-ctrlsyscon2$ usbpciePPQRPS(bususbusb-phy1usb-phy2pciepcie-phy@LLLLLLLLnoc-pcieusb1usb2pcie Oblk-ctrl@32fc0000 2fsl,imx8mp-hdmi-blk-ctrlsyscon2(capbaxiref_266mref_24mfdcc(TTTTTTTUTT=busirqsteerlcdifpaipvitrnghdmi-txhdmi-tx-phyhdcphrv Vinterrupt-controller@32fc2000%2fsl,imx8mp-irqsteerfsl,imx-irqsteer2  m+/@cipgVWdisplay-bridge@32fc40002fsl,imx8mp-hdmi-pvi2@Wm V fdisabledports port@0endpointHX[port@1endpointHY\display-controller@32fc60002fsl,imx8mp-lcdif2`WmZcpixaxidisp_axiV fdisabledportendpointH[Xhdmi@32fd80002fsl,imx8mp-hdmi-tx2~WmcZiahbisfrcecpix6V fdisabledports port@0endpointH\Yport@1phy@32fdff002fsl,imx8mp-hdmi-phy2capbrefV fdisabledZpcie@338000002fsl,imx8mp-pcie3@ dbiconfig 7pciepcie_buspcie_auxx9 pci0X mmsi/2~}|{@SOINN appsturnoffd] ipcie-phy fdisabledpcie-ep@338000002fsl,imx8mp-pcie-ep3@dbiaddr_space 7pciepcie_buspcie_auxx9 mdma@OINN appsturnoffd] ipcie-phys fdisabledgpu@38000000 2vivante,gc8 m 4fcoreshaderbusreg3488//^gpu@38008000 2vivante,gc8 mf corebusreg58/_video-codec@383000002nxp,imx8mm-vpu-g180 mr+#F`video-codec@383100002nxp,imx8mq-vpu-g281 m sAe`blk-ctrl@383300002fsl,imx8mp-vpu-blk-ctrlsyscon83 (abcbusg1g2vc8000e  g1g2vc8000e`+#F#F0L%L$L&L$L'L$g1g2vc8000e`npu@38500000 2vivante,gc8P  m    ijcoreshaderbusregdinterrupt-controller@38800000 2arm,gic-v388 / m memory-controller@3d4000002snps,ddrc-3.80a=@@ mddr-pmu@3d800000%2fsl,imx8mp-ddr-pmufsl,imx8m-ddr-pmu=@ mbusb-phy@381f00402fsl,imx8mp-usb-phy8@@phyO fdisabledeusb@32f101002fsl,imx8mp-dwc328  @ hsiosuspend mO  @@X fdisabledusb@38100000 2snps,dwc38@bus_earlyrefsuspend m(deeiusb2-phyusb3-phyusb-phy@382f00402fsl,imx8mp-usb-phy8/@@phyO fdisabledfusb@32f101082fsl,imx8mp-dwc328/  @ hsiosuspend mO  @@X fdisabledusb@38200000 2snps,dwc38 @bus_earlyrefsuspend m)dffiusb2-phyusb3-phydsp@3b6e80002fsl,imx8mp-dsp;ntxdb0txdb1rxdb0rxdb10ggggh fdisabledchosen6/soc@0/bus@30800000/spba-bus@30800000/serial@30890000gpio-leds 2gpio-ledsled-0power i heartbeatmemory@40000000memory @regulator-usdhc2-vmmc2regulator-fixeddVSD_3V3s2Z2Z j':dK.6 interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5mmc0mmc1mmc2serial0serial1serial2serial3spi0device_typeregclock-latencyclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachenvmem-cellsnvmem-cell-namesoperating-points-v2#cooling-cellscpu-supplyphandlecache-unifiedcache-levelopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspend#clock-cellsclock-frequencyclock-output-namesremote-endpointrangesno-mapstatusinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicearm,no-tick-in-suspendcpuclock-namesgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-ranges#thermal-sensor-cellspinctrl-namespinctrl-0fsl,ext-reset-outputfsl,pinsregmapoffsetlinux,keycodewakeup-sourceassigned-clocksassigned-clock-parentsassigned-clock-rates#reset-cells#power-domain-cellspower-domains#pwm-cellsdmasdma-namesfsl,clk-sourcefsl,stop-moderegulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onregulator-ramp-delaynxp,dvs-run-voltagenxp,dvs-standby-voltagegpio-hoggpiosoutput-lowline-name#mbox-cellsfsl,tuning-start-tapfsl,tuning-stepbus-widthpinctrl-1pinctrl-2cd-gpiosvmmc-supplynon-removablereg-names#dma-cellsfsl,sdma-ram-script-namefsl,num-tx-queuesfsl,num-rx-queuesinterrupt-namesintf_mode#sound-dai-cellsfirmware-namefsl,asrc-ratefsl,asrc-formatresets#interconnect-cellsfsl,blk-ctrlsamsung,pll-clock-frequencypower-domain-namesinterconnectsinterconnect-namesreset-names#phy-cellsfsl,channelfsl,num-irqsreg-io-widthbus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapfsl,max-link-speedlinux,pci-domainphysphy-namesnum-ib-windowsnum-ob-windowsdma-rangessnps,gfladj-refclk-lpm-sel-quirksnps,parkmode-disable-ss-quirkmbox-namesmboxesmemory-regionstdout-pathfunctionlinux,default-triggerenable-active-highstartup-delay-usoff-on-delay-us