g8(8google,voltorb-sku589825google,voltorbmediatek,mt8186 +7laptopDGoogle Voltorb sku589825 boardaliasesJ/soc/ovl@14005000O/soc/ovl@14006000W/soc/rdma@14007000]/soc/rdma@1401f000c/soc/i2c@11007000h/soc/i2c@11008000m/soc/i2c@11009000r/soc/i2c@1100f000w/soc/i2c@11016000|/soc/mmc@11230000/soc/mmc@11240000/soc/serial@11002000ccimediatek,mt8186-ccicciintermediate"opp-table-ccioperating-points-v2opp-500000000e 'opp-560000000!` Lopp-612000000$za opp-682000000(~  opp-752000000,Ҝ YF opp-8220000000  opp-8750000004'p  opp-9270000007@ 5 opp-980000000:i ~>opp-1050000000> opp-1120000000B )$opp-1155000000D opp-1190000000F opp-1260000000K~opp-1330000000OF0)opp-1400000000SrNRopp-table-cluster0operating-points-v2opp-500000000e 'opp-774000000."M Lopp-8750000004'p `opp-975000000:Q  opp-1075000000@2 q opp-1175000000F  X opp-1275000000K 5 opp-1375000000Q  opp-1500000000Yh/ opp-1618000000`p Yopp-1666000000cM$ opp-1733000000gK{@Hopp-1800000000kI~opp-1866000000o8opp-1933000000s7=@Zopp-2000000000w5Ropp-table-cluster1operating-points-v2#opp-774000000."M Lopp-8350000001 opp-9190000006 opp-1002000000;N YF opp-1085000000@@ X opp-1169000000E@ 5 opp-1308000000M  opp-1419000000T8 Y opp-1530000000[1 topp-1670000000c-Zopp-1733000000gK{@opp-1796000000k sopp-1860000000nYԼopp-1923000000r6dopp-1986000000z0opp-2050000000!Vcpus+cpu-mapcluster0core0core1core2core3core4core5core6core7cpu@0cpuarm,cortex-a55 psciw5cpuintermediate)TC~V fs@@!"cpu@100cpuarm,cortex-a55 psciw5cpuintermediate)TC~V fs@@!"cpu@200cpuarm,cortex-a55 psciw5cpuintermediate)TC~V fs@@!"cpu@300cpuarm,cortex-a55 psciw5cpuintermediate)TC~V fs@@!"cpu@400cpuarm,cortex-a55 psciw5cpuintermediate)TC~V fs@@!"cpu@500cpuarm,cortex-a55 psciw5cpuintermediate)TC~V fs@@!"cpu@600cpuarm,cortex-a76 psciz0cpuintermediate#)OCV$%fs@@&"'cpu@700cpuarm,cortex-a76 psciz0cpuintermediate#)OCV$%fs@@&"'idle-statespscicpu-retention-larm,idle-state 21dA@cpu-retention-barm,idle-state 21dAx$cpu-off-larm,idle-state d1A4 cpu-off-barm,idle-state d1Al%l2-cache0cacheRhu@(^!l2-cache1cacheRhu@(^&l3-cachecacheRhu@^(fixed-factor-clock-13mfixed-factor-clockl)yclk13m>oscillator-26m fixed-clocklclk26m)oscillator-32k fixed-clocklclk32kopp-table-gpuoperating-points-v2wopp-299000000` Xopp-332000000 hopp-366000000з <opp-400000000ׄ Ҧopp-434000000P zopp-484000000A 4Nopp-535000000s }opp-586000000" `opp-637000000%@ 4opp-690000000)  @opp-743000000,IG opp-796000000/q opp-8500000002 5opp-900000000-35 Popp-900000000-45 |opp-900000000-55  opp-950000000-38ـ opp-950000000-48ـ Yopp-950000000-58ـ P opp-1000000000-3;~opp-1000000000-4; topp-1000000000-5; Y pmu-a55arm,cortex-a55-pmu *pmu-a76arm,cortex-a76-pmu +psci arm,psci-1.0smctimerarm,armv8-timer @   soc+ simple-businterrupt-controller@c000000 arm,gic-v3      ppi-partitionsinterrupt-partition-0%*interrupt-partition-1%+syscon@c53a000mediatek,mt8186-mcusyssyscon Slsyscon@10000000 mediatek,mt8186-topckgensysconl-syscon@10001000#mediatek,mt8186-infracfg_aosysconl./syscon@10003000mediatek,mt8186-pericfgsyscon0ipinctrl@10005000mediatek,mt8186-pinctrlP "$&*,B;iocfg0iocfg_ltiocfg_lmiocfg_lbiocfg_bliocfg_rbiocfg_rteintEUa, mTPTPTPI2S0_HP_DII2S3_DP_SPKR_DOSAR_INT_ODLBT_WAKE_AP_ODLWIFI_INT_ODLDPBRDG_INT_ODLEDPBRDG_INT_ODLEC_AP_HPD_ODTCHPAD_INT_ODLTCHSCR_INT_1V8_ODLEC_AP_INT_ODLEC_IN_RW_ODLGSC_AP_INT_ODLAP_FLASH_WP_LHP_INT_ODLPEN_EJECT_ODWCAM_PWDN_LWCAM_RST_LUCAM_SEN_ENUCAM_RST_LLTE_RESET_LLTE_SAR_DETECT_LI2S2_DP_SPK_MCKI2S2_DP_SPKR_BCKI2S2_DP_SPKR_LRCKI2S2_DP_SPKR_DI (TP)EN_PP1000_EDPBRDGEN_PP1800_EDPBRDGEN_PP3300_EDPBRDGUART_GSC_TX_AP_RXUART_AP_TX_GSC_RXUART_DBGCON_TX_ADSP_RXUART_ADSP_TX_DBGCON_RXEN_PP1000_DPBRDGTCHSCR_REPORT_DISABLEEN_PP3300_DPBRDGEN_PP1800_DPBRDGSPI_AP_CLK_ECSPI_AP_CS_EC_LSPI_AP_DO_EC_DISPI_AP_DI_EC_DOSPI_AP_CLK_GSCSPI_AP_CS_GSC_LSPI_AP_DO_GSC_DISPI_AP_DI_GSC_DOUART_DBGCON_TX_SCP_RXUART_SCP_TX_DBGCON_RXEN_PP1200_CAM_XEN_PP2800A_VCM_XEN_PP2800A_UCAM_XEN_PP2800A_WCAM_XWLAN_MODULE_RST_LEN_PP1200_UCAM_XI2S1_HP_DOI2S1_HP_BCKI2S1_HP_LRCKI2S1_HP_MCKTCHSCR_RST_1V8_LSPI_AP_CLK_ROMSPI_AP_CS_ROM_LSPI_AP_DO_ROM_DISPI_AP_DI_ROM_DONCNCEMMC_STRBEMMC_CLKEMMC_CMDEMMC_RST_LEMMC_DATA0EMMC_DATA1EMMC_DATA2EMMC_DATA3EMMC_DATA4EMMC_DATA5EMMC_DATA6EMMC_DATA7AP_KPCOL0NCNCNCTPSDIO_CLKSDIO_CMDSDIO_DATA0SDIO_DATA1SDIO_DATA2SDIO_DATA3NCNCNCNCNCNCEDPBRDG_PWRENBL_PWM_1V8EDPBRDG_RST_LMIPI_DPI_CLKMIPI_DPI_VSYNCMIPI_DPI_HSYNCMIPI_DPI_DEMIPI_DPI_D0MIPI_DPI_D1MIPI_DPI_D2MIPI_DPI_D3MIPI_DPI_D4MIPI_DPI_D5MIPI_DPI_D6MIPI_DPI_DA7MIPI_DPI_D8MIPI_DPI_D9MIPI_DPI_D10MIPI_DPI_D11PCM_BT_CLKPCM_BT_SYNCPCM_BT_DIPCM_BT_DOJTAG_TMS_TPJTAG_TCK_TPJTAG_TDI_TPJTAG_TDO_TPJTAG_TRSTN_TPCLK_24M_WCAMCLK_24M_UCAMUCAM_DET_ODLAP_I2C_EDPBRDG_SCL_1V8AP_I2C_EDPBRDG_SDA_1V8AP_I2C_TCHSCR_SCL_1V8AP_I2C_TCHSCR_SDA_1V8AP_I2C_TCHPAD_SCL_1V8AP_I2C_TCHPAD_SDA_1V8AP_I2C_DPBRDG_SCL_1V8AP_I2C_DPBRDG_SDA_1V8AP_I2C_WLAN_SCL_1V8AP_I2C_WLAN_SDA_1V8AP_I2C_AUD_SCL_1V8AP_I2C_AUD_SDA_1V8AP_I2C_TPM_SCL_1V8AP_I2C_UCAM_SDA_1V8AP_I2C_UCAM_SCL_1V8AP_I2C_UCAM_SDA_1V8AP_I2C_WCAM_SCL_1V8AP_I2C_WCAM_SDA_1V8SCP_I2C_SENSOR_SCL_1V8SCP_I2C_SENSOR_SDA_1V8AP_EC_WARM_RST_REQAP_XHCI_INIT_DONEUSB3_HUB_RST_LEN_SPKRBEEP_ONAP_EDP_BKLTENEN_PP3300_DISP_XEN_PP3300_SDBRDG_XBT_KILL_1V8_LWIFI_KILL_1V8_LPWRAP_SPI0_CSNPWRAP_SPI0_CKPWRAP_SPI0_MOPWRAP_SPI0_MISRCLKENA0SRCLKENA1SCP_VREQ_VAOAP_RTC_CLK32KAP_PMIC_WDTRST_LAUD_CLK_MOSIAUD_SYNC_MOSIAUD_DAT_MOSI0AUD_DAT_MOSI1AUD_CLK_MISOAUD_SYNC_MISOAUD_DAT_MISO0AUD_DAT_MISO1NCNCDPBRDG_PWRENDPBRDG_RST_LLTE_W_DISABLE_LLTE_SAR_DETECT_LEN_PP3300_LTE_XLTE_PWR_OFF_LLTE_RESET_LTPTP,aud-clk-mosi-off-pinspins-clk-sync}aud-clk-mosi-on-pinspins-clk-sync}aud-clk-miso-off-pinspins-clk-sync}aud-clk-miso-on-pinspins-clk-sync}aud-dat-mosi-off-pinspins-dat}aud-dat-mosi-on-pinspins-dat}aud-dat-miso-off-pinspins-dat}aud-dat-miso-on-pinspins-dat}aud-gpio-i2s0-off-pinspins-sdata}aud-gpio-i2s0-on-pinspins-sdata}aud-gpio-i2s-off-pinspins-clk-sdata}89:;aud-gpio-i2s1-on-pinspins-clk-sdata}89:;aud-gpio-i2s2-off-pinspins-cmd-dat}aud-gpio-i2s2-on-pinspins-clk}aud-gpio-i2s3-off-pinspins-sdata}aud-gpio-i2s3-on-pinspins-sdata}aud-gpio-pcm-off-pinspins-clk-sdata}stuvaud-gpio-pcm-on-pinspins-clk-sdata}stuvaud-gpio-dmic-sec-pinspins}bt-reset-pinsqpins-bt-reset}dpi-sleep-pins|pins-cmd-dat@}ghijklmnopqredfc dpi-default-pins{pins-cmd-dat@}ghijklmnopqredfc cros-ec-int-pinsdpins-ec-ap-int-odl} edp-panel-fixed-pinspins-vreg-en}en-pp1800-dpbrdg-pinspins-vreg-en}'gsc-int-pinsfpins-gsc-ap-int-odl}i2c0-pinsHpins-bus}i2c1-pinsRpins-bus}i2c2-pinsUpins-bus}i2c3-pinsWpins-bus}i2c5-pins\pins-bus}it6505-pinsXpins-hpd} pins-int}pins-reset}mmc0-default-pinsjpins-clk}Dfpins-cmd-dat$}GHIJKLMNEepins-rst}Femmc0-uhs-pinskpins-clk}Dfpins-cmd-dat$}GHIJKLMNEepins-ds}Cfpins-rst}Femmc1-default-pinsmpins-clk}Tfpins-cmd-dat}VWXYUemmc1-uhs-pinsnpins-clk}Tfpins-cmd-dat}VWXYUemmc1-eint-pinsopins-dat1}Wenor-default-pinsFpins-clk-dat }?=@pins-cs-dat }>ABpen-eject-pinspins}disp-pwm-pinsbpins}aspeaker-codec-default-pinspins-sdb}scp-default-pins?pins-scp-uart}01spi1-pinscpins-bus}()*+spi2-pinsepins-bus},-./spmi-pins=pins-bus}touchscreen-pinsSpins-irq} pins-reset}<pins-report-sw}%trackpad-default-pinsVpins-int-n} wifi-enable-pinspins-wifi-enable}6wifi-wakeup-pinspins-wifi-wakeup}anx7625-pinsIpins-int} pins-reset}bpins-power-en}`pp1000-edpbrdg-en-pinspins-vreg-en}pp1800-edpbrdg-en-pinspins-vreg-en}pp3300-edpbrdg-en-pinspins-vreg-en}syscon@10006000)mediatek,mt8186-scpsyssysconsimple-mfd`power-controller!mediatek,mt8186-power-controller+Cpower-domain@0-mfg00+ .power-domain@1/+ 0power-domain@2power-domain@3power-domain@17--$subsys-csirx-top0subsys-csirx-top1power-domain@4-/=sys_ckref_ckpower-domain@5/B/?sys_ckref_ckpower-domain@18-/->audioadspsubsys-adsp-bus+power-domain@19+power-domain@20/power-domain@16/power-domain@60-*-+1 111Mdispmdpsubsys-smi-infrasubsys-smi-commonsubsys-smi-galssubsys-smi-iommu/+power-domain@14-)2 vdec0larb/power-domain@10 8---- 3-#-%6cam0cam1cam2cam3galssubsys-cam-tmsubsys-cam-top/+power-domain@12 power-domain@11 power-domain@74-&galssubsys-img-top/+power-domain@8power-domain@9 (-'5555Psubsys-ipe-topsubsys-ipe-larb0subsys-ipe-larb1subsys-ipe-smisubsys-ipe-gals/power-domain@13 -$6venc0subsys-larb/power-domain@15-:77%wpe0subsys-larb-cksubsys-larb-pclk/watchdog@10007000mediatek,mt8186-wdt)p.Agsyscon@1000c000"mediatek,mt8186-apmixedsyssysconlpwrap@1000d000mediatek,mt8186-pwrapsyscon;pwrap// spiwrappmic mediatek,mt6366mediatek,mt6358 Z,codec,mediatek,mt6366-soundmediatek,mt6358-soundn8zregulators4mediatek,mt6366-regulatormediatek,mt6358-regulator9999999 99-9A9Q9a:q;<<vcorepp0750_dvdd_coredp 5j)vdram1pp1125_emi_vdd2**0);vgpuppvar_dvdd_vgpu ~j=.T0vproc11ppvar_dvdd_proc_bc_mt6366 'Oj) qdisabledvproc12ppvar_dvdd_proc_lc 'Oj)vs1 pp2000_vs10):vs2 pp1350_vs2pp0)<va12 pp1200_va12OO)vaud28pp2800_vaud28**8vaux18pp1840_vaux18w@vbif28pp2800_vbif28**vcn18pp1800_vcn18_xw@w@vcn28pp2800_vcn28_x**vefusepp1800_vefusew@w@vfe28pp2800_vfe28_x**vemc pp3000_vemc--<lvibrpp2800_vibr_x**<vio18pp1800_vio18_s3w@w@ )]vio28pp2800_vio28_x**vm18pp1800_emi_vdd1w@E)vmc pp3000_vmc--<vmddrpm0750_emi_vmddr ` qE)vmch pp3000_vmch--<vcn33pp3300_vcn33_x2Z2Zvdram2pp0600_emi_vddq ' ' )vrf12pp1200_vrf12_xOOxvrf18pp1800_vrf18_xw@w@xvsim1pp1860_vsim1_xw@avsim2pp2760_vsim2_x)2*@Yvsram-gpupp0900_dvdd_sram_gpu Pj=0T.vsram-otherspp0900_dvdd_sram_core  j)vsram-proc11pp0900_dvdd_sram_bc Pj)vsram-proc12pp0900_dvdd_sram_lc Pj)vusb pp3070_vusb-.0)vxo22 pp2240_vxo22!".x)rtc(mediatek,mt6366-rtcmediatek,mt6358-rtcspmi@10015000*mediatek,mt8186-spmimediatek,mt8195-spmi P ;pmifspmimst//-2(pmif_sys_ckpmif_tmr_ckspmimst_clk_muxx-2-t qokaydefault=+pmic@64mediatek,mt6319-regulatormediatek,mt6315-regulatorregulatorsvbuck1ppvar_dvdd_proc_bc_mt6319 '7 )'timer@10017000,mediatek,mt8186-timermediatek,mt6765-timerp>mailbox@1022c000mediatek,mt8186-gce"@/gcexscp@10500000mediatek,mt8186-scp P\ ;sramcfgdefault?mediatek/mt8186/scp.img@qokaycros-ec-rpmsggoogle,cros-ec-rpmsgcros-ec-rpmsgadsp@10680000mediatek,mt8186-dsp@h hh;cfgsramsecbus-/->audiodspadsp_busx-/-> )-ErxtxABCqokayDEmailbox@10686100mediatek,mt8186-adsp-mboxhaiAmailbox@10687100mediatek,mt8186-adsp-mboxhqjBspi@11000000mediatek,mt8186-nor -3/O/c/dspisfaxiaxi_sx-3-P%qokaydefaultF+flash@0jedec,spi-norSadc@11001000.mediatek,mt8186-auxadcmediatek,mt8173-auxadc%/"mainserial@11002000*mediatek,mt8186-uartmediatek,mt6577-uart p )/ baudbusqokayserial@11003000*mediatek,mt8186-uartmediatek,mt6577-uart0q )/ baudbus qdisabledi2c@11007000mediatek,mt8186-i2c p iG/' maindmay+qokaydefaultHanx7625@58analogix,anx7625XdefaultI 7,` D,bPJ]KjLwp0p0ports+port@0endpointMport@1endpointNQaux-buspanel edp-panelOPportendpointQNi2c@11008000mediatek,mt8186-i2c  jG/' maindmay+qokaydefaultR@touchscreen@5dgoodix,gt7375p] Z, defaultS D,<oT qdisabledtouchscreen@10elan,ekth6915 Z, defaultS D,< Ti2c@11009000mediatek,mt8186-i2c  kG/' maindmay+qokaydefaultUVUtrackpad@15elan,ekth3000 Z, T$trackpad@2c hid-over-i2c,2  Z, oT$i2c@1100f000mediatek,mt8186-i2c  lG/' maindmay+qokaydefaultWdp-bridge@5c ite,it6505\ Z,defaultXARY^Z D,ports+port@0endpointkр[}port@1i2c@11011000mediatek,mt8186-i2c  mG/' maindmay+ qdisabledi2c@11016000mediatek,mt8186-i2c ` bG/' maindmay+qokaydefault\codec@1arealtek,rt5682s Z,A|]]]^i2c@1100d000mediatek,mt8186-i2c  cG/' maindmay+ qdisabledi2c@11004000mediatek,mt8186-i2c @ nG/' maindmay+ qdisabledi2c@11005000mediatek,mt8186-i2c P oG/' maindmay+ qdisabledspi@1100a000(mediatek,mt8186-spimediatek,mt6765-spi+-K- /parent-clksel-clkspi-clk qdisabledthermal-sensor@1100b000mediatek,mt8186-lvtsc/ /_`$lvts-calib-data-1lvts-calib-data-2svs@1100bc00mediatek,mt8186-svs/ maina_(svs-calibration-datat-calibration-data/svs_rstpwm@1100e0002mediatek,mt8186-disp-pwmmediatek,mt8183-disp-pwm -/4mainmmqokaydefaultbspi@11010000(mediatek,mt8186-spimediatek,mt6765-spi+-K- /8parent-clksel-clkspi-clkqokaydefaultc ec@0google,cros-ec-spi Z, defaultdB@i2c-tunnelgoogle,cros-ec-i2c-tunnel &+sbs-battery@bsbs,sbs-battery  8 Ltypecgoogle,cros-ec-typec+connector@0usb-c-connector aleft gdual rhost |sourceconnector@1usb-c-connector aright gdual rhost |sourcekeyboard-controllergoogle,cros-ec-keyb   D txc q rs}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g i(   spi@11012000(mediatek,mt8186-spimediatek,mt6765-spi+ -K- /;parent-clksel-clkspi-clkqokaydefaulte ,- tpm@0 google,cr50 Z,defaultfB@spi@11013000(mediatek,mt8186-spimediatek,mt6765-spi+0-K- /<parent-clksel-clkspi-clk qdisabledspi@11014000(mediatek,mt8186-spimediatek,mt6765-spi+@t-K- /Jparent-clksel-clkspi-clk qdisabledspi@11015000(mediatek,mt8186-spimediatek,mt6765-spi+Pu-K- /Kparent-clksel-clkspi-clk qdisabledclock-controller@11017000mediatek,mt8186-imp_iic_wrapplGserial@11018000*mediatek,mt8186-uartmediatek,mt6577-uart )/ baudbus qdisabledi2c@11019000mediatek,mt8186-i2c  dG /' maindmay+ qdisabledaudio-controller@11210000mediatek,mt8186-sound! /,/6---F- - --e--h-?-@-A-B-C------,)}aud_infra_clkmtkaif_26m_clktop_mux_audiotop_mux_audio_inttop_mainpll_d2_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d8top_mux_aud_eng2top_apll2_d8top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s4_m_seltop_tdm_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div4top_apll12_div_tdmtop_mux_audio_htop_clk26m_clk / -g audiosysqokayusb@11201000#mediatek,mt8186-mtu3mediatek,mtu3  - > ;macippc(-/=/3//>$sys_ckref_ckmcu_ckdma_ckxhci_ck/ hC+qokayusb@11200000'mediatek,mt8186-xhcimediatek,mtk-xhci ;mac(-/=/3//>$sys_ckref_ckmcu_ckdma_ckxhci_ck& i $qokay 5Tmmc@11230000(mediatek,mt8186-mmcmediatek,mt8183-mmc # - //U/sourcehclksource_cgcryptodx- qokaydefaultstate_uhsj Ak K  U c u        l ]mmc@11240000(mediatek,mt8186-mmcmediatek,mt8183-mmc $-//Vsourcehclksource_cgx--oqokaydefaultstate_uhsstate_eintm An o msdcsdio_wakeup Ze,W+ K   ) 7 D$ Z g  U T ] npbluetooth@2mediatek,mt7921s-bluetoothdefaultq D,usb@11281000#mediatek,mt8186-mtu3mediatek,mtu3 (-(> ;macippc$/B/?/7)/@$sys_ckref_ckmcu_ckdma_ckxhci_ckK rsC+qokayusb@11280000'mediatek,mt8186-xhcimediatek,mtk-xhci(;mac$/B/?/7)/@$sys_ckref_ckmcu_ckdma_ckxhci_ckD i$$qokay 5tt-phy@11c80000.mediatek,mt8186-tphymediatek,generic-tphy-v2+qokayusb-phy@0)ref yrusb-phy@700 )ref yst-phy@11ca0000.mediatek,mt8186-tphymediatek,generic-tphy-v2+qokayusb-phy@0)ref y hefuse@11cb0000%mediatek,mt8186-efusemediatek,efuse+lvts1-calib@1cc_lvts2-calib@2f8`calib@550PPagpu-speedbin@59c vsocinfo-data1@7a0dsi-phy@11cc0000mediatek,mt8183-mipi-tx)l y mipi_tx0_pllqokay~clock-controller@13000000mediatek,mt8186-mfgsyslugpu@13040000&mediatek,mt8186-maliarm,mali-bifrost@u0 jobmmugpuCC core0core1v speed-binw)Oqokay 0syscon@14000000mediatek,mt8186-mmsyssysconl.xx x1mutex@14001000mediatek,mt8186-disp-mutex1' x Csmi@14002000mediatek,mt8186-smi-common  1111apbsmigals0gals1Cysmi@14003000mediatek,mt8186-smi-larb011apbsmi  yCsmi@14004000mediatek,mt8186-smi-larb@11apbsmi  yCovl@140050002mediatek,mt8186-disp-ovlmediatek,mt8192-disp-ovlP1) z xPCovl@140060008mediatek,mt8186-disp-ovl-2lmediatek,mt8192-disp-ovl-2l`1* z! x`Crdma@140070004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdmap1+ z" xpCcolor@140090006mediatek,mt8186-disp-colormediatek,mt8173-disp-color1 - xCdpi@1400a000mediatek,mt8186-dpi-;1 pixelenginepllx-;-j5C qdisableddefaultsleep{ A|portendpoint}[ccorr@1400b0006mediatek,mt8186-disp-ccorrmediatek,mt8192-disp-ccorr1. xCaal@1400c0002mediatek,mt8186-disp-aalmediatek,mt8183-disp-aal10 xCgamma@1400d0006mediatek,mt8186-disp-gammamediatek,mt8183-disp-gamma1 1 xCpostmask@1400e000<mediatek,mt8186-disp-postmaskmediatek,mt8192-disp-postmask1 2 xCdither@1400f0008mediatek,mt8186-disp-dithermediatek,mt8183-disp-dither13 xCdsi@14013000mediatek,mt8186-dsi011~enginedigitalhs7C1 ~ dphyqokayportendpointMiommu@14016000mediatek,mt8186-iommu-mm`1bclk98 C "zrdma@1401f0004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdma14 z  xCclock-controller@14020000mediatek,mt8186-wpesysl7smi@14023000mediatek,mt8186-smi-larb077apbsmi  yCclock-controller@15020000mediatek,mt8186-imgsys1l4smi@1502e000mediatek,mt8186-smi-larb44apbsmi  yCclock-controller@15820000mediatek,mt8186-imgsys2lsmi@1582e000mediatek,mt8186-smi-larb4apbsmi  yCvideo-decoder@16000000mediatek,mt8186-vcodec-dec+@ z /video-codec@16025000mediatek,mtk-vcodec-corePW` zzzzzzzzzzzz -)22-U%vdec-selvdec-soc-vdecvdecvdec-topx-)-UCsmi@1602e000mediatek,mt8186-smi-larb22apbsmi  yCclock-controller@1602f000mediatek,mt8186-vdecsysl2clock-controller@17000000mediatek,mt8186-vencsysl6smi@17010000mediatek,mt8186-smi-larb66apbsmi  yC video-encoder@170200006mediatek,mt8186-vcodec-encmediatek,mt8183-vcodec-enc H zzzzzzzzz6 venc_selx-$-UC  /jpeg-encoder@17030000+mediatek,mt8186-jpgencmediatek,mtk-jpgenc6jpgenc zzzzC clock-controller@1a000000mediatek,mt8186-camsysl3smi@1a001000mediatek,mt8186-smi-larb33apbsmi  yC smi@1a002000mediatek,mt8186-smi-larb 33apbsmi  yC smi@1a00f000mediatek,mt8186-smi-larb3apbsmi  yC smi@1a010000mediatek,mt8186-smi-larb3apbsmi  yC clock-controller@1a04f000mediatek,mt8186-camsys_rawalclock-controller@1a06f000mediatek,mt8186-camsys_rawblclock-controller@1b000000mediatek,mt8186-mdpsyslsmi@1b002000mediatek,mt8186-smi-larb apbsmi  yCclock-controller@1c000000mediatek,mt8186-ipesysl5smi@1c00f000mediatek,mt8186-smi-larb55apbsmi  yC smi@1c10f000mediatek,mt8186-smi-larb55apbsmi  yC thermal-zonescpu-little0-thermal < J `tripstrip-alert0 pL |?passivetrip-alert1 ps |?hottrip-crit p | ?criticalcooling-mapsmap0 H cpu-little1-thermal < J `tripstrip-alert0 pL |?passivetrip-alert1 ps |?hottrip-crit p | ?criticalcooling-mapsmap0 H cpu-little2-thermal < J `tripstrip-alert0 pL |?passivetrip-alert1 ps |?hottrip-crit p | ?criticalcooling-mapsmap0 H cam-thermal < J `tripstrip-alert0 pL |?passivetrip-alert1 ps |?hottrip-crit p | ?criticalnna-thermal < J `tripstrip-alert0 pL |?passivetrip-alert1 ps |?hottrip-crit p | ?criticaladsp-thermal < J `tripstrip-alert0 pL |?passivetrip-alert1 ps |?hottrip-crit p | ?criticalgpu-thermal < J `tripstrip-alert0 pL |?passivetrip-alert1 ps |?hottrip-crit p | ?criticalcooling-mapsmap0  cpu-big0-thermal < Jd `tripstrip-alert0 pL |?passivetrip-alert1 ps |?hottrip-crit p | ?criticalcooling-mapsmap0  cpu-big1-thermal < Jd `tripstrip-alert0 pL |?passivetrip-alert1 ps |?hottrip-crit p | ?criticalcooling-mapsmap0  chosen serial0:115200n8memory@40000000memory@backlight-lcd0pwm-backlight   7,   @Pbt-sco linux,bt-scoAdmic-codec dmic-codecA  2gpio-keys gpio-keysdefault qdisabledpen-insert-switch aPen Insert >, $  *regulator-pp1800-dpbrdg-dxregulator-fixeddefault >,'pp1800_dpbrdg_dx ; N]Zregulator-pp3300-disp-xregulator-fixeddefault >,pp3300_disp_x ; Y N^Oregulator-pp3300-ldo-z5regulator-fixedpp3300_ldo_z5) Y2Z2Z Nregulator-pp3300-s3regulator-fixed pp3300_s3) Y N^Tregulator-pp3300-z2regulator-fixed pp3300_z2) Y2Z2Z N^regulator-pp4200-z2regulator-fixed pp4200_z2) Y@@@@ N9regulator-pp5000-z2regulator-fixed pp5000_z2) YLK@LK@ Nregulator-ppvar-sysregulator-fixed ppvar_sys) Yreserved-memory+memory@61000000shared-dma-poola kDmemory@60000000shared-dma-pool` kEmemory@50000000shared-dma-poolP  k@sound.mediatek,mt8186-mt6366-rt5682s-max98360-soundCaud_clk_mosi_offaud_clk_mosi_onaud_clk_miso_offaud_clk_miso_onaud_dat_miso_offaud_dat_miso_onaud_dat_mosi_offaud_dat_mosi_onaud_gpio_i2s0_offaud_gpio_i2s0_onaud_gpio_i2s1_offaud_gpio_i2s1_onaud_gpio_i2s2_offaud_gpio_i2s2_onaud_gpio_i2s3_offaud_gpio_i2s3_onaud_gpio_pcm_offaud_gpio_pcm_onaud_gpio_dmic_sec A  r |            )I;HeadphoneHPOLHeadphoneHPORIN1PHeadset MicSpeakersSpeakerHDMI1TXhs-playback-dai-linkII2S0Si2s^cpucodecths-capture-dai-linkII2S1Si2s^cpucodectspk-share-dai-linkII2S2^cpuspk-hdmi-playback-dai-linkII2S3Si2s^cpucodectspeaker-codecmaxim,max98360adefaultA ~,regulator-usb-p1-vbusregulator-fixed ,vbus1LK@LK@ ; Ntwifi-pwrseqmmc-pwrseq-simpledefault2 D,6pwifi-wakeup gpio-keysdefaultwowlan-event aWake on WiFi >, $regulator-pp1000-edpbrdgregulator-fixedpp1000_edpbrdgdefault ; Y , N^Jregulator-pp1800-edpbrdg-dxregulator-fixedpp1800_edpbrdg_dxdefault ; Y , N]Kregulator-pp3300-edp-dxregulator-fixedpp3300_edp_dxdefault ; Y , N^L compatibleinterrupt-parent#address-cells#size-cellschassis-typemodelovl0ovl-2l0rdma0rdma1i2c0i2c1i2c2i2c3i2c5mmc0mmc1serial0clocksclock-namesoperating-points-v2proc-supplyphandleopp-sharedopp-hzopp-microvoltrequired-oppscpudevice_typeregenable-methodclock-frequencydynamic-power-coefficientcapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsmediatek,ccientry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-divclock-multclock-output-namesopp-supported-hwinterruptsdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controllermediatek,broken-save-restore-fwaffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namespinmuxinput-enablebias-pull-downinput-schmitt-enablebias-disableoutput-lowdrive-strengthoutput-highbias-pull-up#power-domain-cellsdomain-supplymediatek,infracfgmediatek,disable-extrstmediatek,reset-by-toprguinterrupts-extendedAvdd-supplymediatek,dmic-modevsys-ldo1-supplyvsys-ldo2-supplyvsys-ldo3-supplyvsys-vcore-supplyvsys-vdram1-supplyvsys-vgpu-supplyvsys-vmodem-supplyvsys-vpa-supplyvsys-vproc11-supplyvsys-vproc12-supplyvsys-vs1-supplyvsys-vs2-supplyvs1-ldo1-supplyvs2-ldo1-supplyvs2-ldo2-supplyvs2-ldo3-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-allowed-modesregulator-always-onregulator-coupled-withregulator-coupled-max-spreadstatusassigned-clocksassigned-clock-parentspinctrl-namespinctrl-0#mbox-cellsfirmware-namememory-regionmediatek,rpmsg-namembox-namesmboxespower-domainsspi-max-frequency#io-channel-cellsenable-gpiosreset-gpiosvdd10-supplyvdd18-supplyvdd33-supplyanalogix,lane0-swinganalogix,lane1-swingremote-endpointdata-lanespower-supplybacklighti2c-scl-internal-delay-nsgoodix,no-reset-during-suspendvcc33-supplyvcc-supplywakeup-sourcehid-descr-addr#sound-dai-cellsovdd-supplypwr18-supplylink-frequenciesAVDD-supplyDBVDD-supplyLDO1-IN-supplyMICVDD-supplyrealtek,jd-srcresetsnvmem-cellsnvmem-cell-names#thermal-sensor-cellsreset-names#pwm-cellsmediatek,pad-selectgoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countlabelpower-roledata-roletry-power-rolekeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymapfunction-row-physmapcs-gpiosmediatek,apmixedsysmediatek,topckgenphysmediatek,syscon-wakeupvbus-supplypinctrl-1bus-widthnon-removablecap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vsupports-cqeno-sdno-sdiocap-mmc-hw-reseths400-ds-delaymediatek,hs400-ds-dly3vmmc-supplyvqmmc-supplypinctrl-2interrupt-namescap-sd-highspeedsd-uhs-sdr104sd-uhs-sdr50keep-power-in-suspendcap-sdio-irqno-mmcmmc-pwrseq#phy-cellsmediatek,discthbitspower-domain-namesmali-supplymediatek,gce-client-regmediatek,gce-eventsmediatek,larb-idmediatek,smiiommusphy-namesmediatek,larbs#iommu-cellsmediatek,scppolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-pathpwmsbrightness-levelsnum-interpolated-stepsdefault-brightness-levelnum-channelswakeup-delay-mswakeup-event-actionlinux,codelinux,input-typeenable-active-highvin-supplyregulator-boot-onno-mappinctrl-3pinctrl-4pinctrl-5pinctrl-6pinctrl-7pinctrl-8pinctrl-9pinctrl-10pinctrl-11pinctrl-12pinctrl-13pinctrl-14pinctrl-15pinctrl-16pinctrl-17pinctrl-18mediatek,adspmediatek,platformaudio-routinglink-namedai-formatmediatek,clk-providersound-daisdmode-gpiosgpiopost-power-on-delay-ms