8zt(oz<&firefly,roc-rk3308-ccrockchip,rk3308 +7Firefly ROC-RK3308-CC boardaliases=/pinctrl/gpio@ff220000C/pinctrl/gpio@ff230000I/pinctrl/gpio@ff240000O/pinctrl/gpio@ff250000U/pinctrl/gpio@ff260000[/i2c@ff040000`/i2c@ff050000e/i2c@ff060000j/i2c@ff070000o/serial@ff0a0000w/serial@ff0b0000/serial@ff0c0000/serial@ff0d0000/serial@ff0e0000/spi@ff120000/spi@ff130000/spi@ff140000/mmc@ff480000/mmc@ff490000cpus+cpu@0cpuarm,cortex-a35psciZ"3>cpu@1cpuarm,cortex-a35psci">cpu@2cpuarm,cortex-a35psci"> cpu@3cpuarm,cortex-a35psci"> idle-statesFpscicpu-sleeparm,idle-stateSd{x>l2-cachecache>opp-table-0operating-points-v2>opp-408000000Q ~~r`@opp-600000000#F ~~r`@opp-8160000000, r`@opp-1008000000< **r`@arm-pmuarm,cortex-a35-pmu0STUV external-mac-clock fixed-clock" 2mac_clkinEpsci arm,psci-1.0smctimerarm,armv8-timer0   xin24m fixed-clockE"n62xin24m>Rgrf@ff000000&rockchip,rk3308-grfsysconsimple-mfd>5reboot-modesyscon-reboot-modeRYRBiRBuRBRBRB syscon@ff008000.rockchip,rk3308-usb2phy-grfsysconsimple-mfd@+usb2phy@100rockchip,rk3308-usb2phy Hphyclk 2usb480m_phyE disabled> otg-port$CDEotg-bvalidotg-idlinestate disabled>;host-port J linestate disabled><syscon@ff00b000-rockchip,rk3308-detect-grfsysconsimple-mfd+syscon@ff00c000+rockchip,rk3308-core-grfsysconsimple-mfd+i2c@ff040000(rockchip,rk3308-i2crockchip,rk3399-i2c i2cpclk  default + disabledi2c@ff050000(rockchip,rk3308-i2crockchip,rk3399-i2c i2cpclk  default +okay"rtc@51 nxp,pcf8563QEi2c@ff060000(rockchip,rk3308-i2crockchip,rk3399-i2c i2cpclk  default+ disabledi2c@ff070000(rockchip,rk3308-i2crockchip,rk3399-i2c i2cpclk default+ disabledwatchdog@ff080000 rockchip,rk3308-wdtsnps,dw-wdt   disabledserial@ff0a0000&rockchip,rk3308-uartsnps,dw-apb-uart  baudclkapb_pclk default  disabledserial@ff0b0000&rockchip,rk3308-uartsnps,dw-apb-uart  baudclkapb_pclk default  disabledserial@ff0c0000&rockchip,rk3308-uartsnps,dw-apb-uart  baudclkapb_pclk defaultokayserial@ff0d0000&rockchip,rk3308-uartsnps,dw-apb-uart  baudclkapb_pclk default disabledserial@ff0e0000&rockchip,rk3308-uartsnps,dw-apb-uart baudclkapb_pclk default  disabledspi@ff120000(rockchip,rk3308-spirockchip,rk3066-spi +spiclkapb_pclk!&txrxdefault disabledspi@ff130000(rockchip,rk3308-spirockchip,rk3066-spi +spiclkapb_pclk!&txrxdefault !"# disabledspi@ff140000(rockchip,rk3308-spirockchip,rk3066-spi +spiclkapb_pclk!$$&txrxdefault%&'( disabledpwm@ff160000(rockchip,rk3308-pwmrockchip,rk3328-pwmy pwmpclkdefault)0 disabledpwm@ff160010(rockchip,rk3308-pwmrockchip,rk3328-pwmy pwmpclkdefault*0 disabledpwm@ff160020(rockchip,rk3308-pwmrockchip,rk3328-pwm y pwmpclkdefault+0 disabledpwm@ff160030(rockchip,rk3308-pwmrockchip,rk3328-pwm0y pwmpclkdefault,0 disabledpwm@ff170000(rockchip,rk3308-pwmrockchip,rk3328-pwmx pwmpclkdefault-0 disabledpwm@ff170010(rockchip,rk3308-pwmrockchip,rk3328-pwmx pwmpclkactive.0okay>`pwm@ff170020(rockchip,rk3308-pwmrockchip,rk3328-pwm x pwmpclkdefault/0 disabledpwm@ff170030(rockchip,rk3308-pwmrockchip,rk3328-pwm0x pwmpclkdefault00 disabledpwm@ff180000(rockchip,rk3308-pwmrockchip,rk3328-pwm pwmpclkdefault10okay>epwm@ff180010(rockchip,rk3308-pwmrockchip,rk3328-pwm pwmpclkdefault20 disabledpwm@ff180020(rockchip,rk3308-pwmrockchip,rk3328-pwm  pwmpclkdefault30 disabledpwm@ff180030(rockchip,rk3308-pwmrockchip,rk3328-pwm0 pwmpclkdefault40 disabledrktimer@ff1a0000rockchip,rk3288-timer   pclktimersaradc@ff1e0000.rockchip,rk3308-saradcrockchip,rk3399-saradc %%saradcapb_pclk;MF Tsaradc-apb disableddma-controller@ff2c0000arm,pl330arm,primecell,@` apb_pclkw>dma-controller@ff2d0000arm,pl330arm,primecell-@` apb_pclkw>$i2s@ff320000rockchip,rk3308-i2s-tdm2 2mclk_txmclk_rxhclkTV!$$&rxtxM Ttx-mrx-m5 disabledi2s@ff330000rockchip,rk3308-i2s-tdm3 3mclk_txmclk_rxhclkXZ!$&rxM Ttx-mrx-m5 disabledi2s@ff350000(rockchip,rk3308-i2srockchip,rk3066-i2s5 4\i2s_clki2s_hclk!$$ &txrxMTreset-mreset-hdefault6789 disabledi2s@ff360000(rockchip,rk3308-i2srockchip,rk3066-i2s6 5^i2s_clki2s_hclk!$ &rxMTreset-mreset-h disabledspdif-tx@ff3a0000,rockchip,rk3308-spdifrockchip,rk3066-spdif: 7b mclkhclk!$ &txdefault: disabledusb@ff4000002rockchip,rk3308-usbrockchip,rk3066-usbsnps,dwc2@ Botgotg@ ; usb2-phy disabledusb@ff440000 generic-ehciD G <usb disabledusb@ff450000 generic-ohciE H <usb disabledmmc@ff4800000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcH@ L 012biuciuciu-driveciu-sampleрdefault=>?@okay ,.;HVAbBmmc@ff4900000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcI@ M :;<biuciuciu-driveciu-sampleрokayo~mmc@ff4a00000rockchip,rk3308-dw-mshcrockchip,rk3288-dw-mshcJ@ N 567biuciuciu-driveciu-sampleрdefault CDE disablednand-controller@ff4b0000(rockchip,rk3308-nfcrockchip,rv1108-nfcK@ Q-ahbnfc-рFGHIJKLdefault disabledethernet@ff4e0000rockchip,rk3308-gmacN @macirq@@BBA@C[stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speedrmiidefaultMNM} Tstmmaceth5 disabledspi@ff4c0000 rockchip,sfcL@ R=clk_sfchclk_sfc OPQdefault disabledclock-controller@ff500000rockchip,rk3308-cruPRxin24m5E>codec@ff560000rockchip,rk3308-codecV5mclk_txmclk_rxhclkUWTcodecM disabledinterrupt-controller@ff580000 arm,gic-400@XX X@ X`   >sram@fff80000 mmio-sram+ddr-sram@0vad-sram@8000pinctrlrockchip,rk3308-pinctrl5+defaultSgpio@ff220000rockchip,gpio-bank" (>^gpio@ff230000rockchip,gpio-bank# )gpio@ff240000rockchip,gpio-bank$ *gpio@ff250000rockchip,gpio-bank% +gpio@ff260000rockchip,gpio-bank& ,>cpcfg-pull-up>]pcfg-pull-down>Zpcfg-pull-none->Vpcfg-pull-none-2ma-:pcfg-pull-up-2ma:pcfg-pull-up-4ma:>\pcfg-pull-none-4ma-:>[pcfg-pull-down-4ma:pcfg-pull-none-8ma-:>Tpcfg-pull-up-8ma:>Upcfg-pull-none-12ma-: >Xpcfg-pull-up-12ma: >Wpcfg-pull-none-smt-I>Ypcfg-output-high^pcfg-output-lowjpcfg-input-highupcfg-inputuemmcemmc-clk Temmc-cmdUemmc-pwren Vemmc-rstn Vemmc-bus1Uemmc-bus4@UUUUemmc-bus8UUUUUUUUflashflash-csn0 V>Iflash-rdy V>Kflash-ale V>Fflash-cle V>Hflash-wrnV>Lflash-rdn V>Jflash-bus8WWWWWWWW>Gsfcsfc-bus4@VVVV>Qsfc-bus2 VVsfc-cs0V>Psfc-clkV>Ogmacrmii-pinsXXXVVVVV V>Mmac-refclk-12ma X>Nmac-refclk Vgmac-m1rmiim1-pinsXXXVVVVV Vmacm1-refclk-12ma Xmacm1-refclk Vi2c0i2c0-xfer YY> i2c1i2c1-xfer  Y Y> i2c2i2c2-xfer YY>i2c3-m0i2c3m0-xfer YY>i2c3-m1i2c3m1-xfer  Y Yi2c3-m2i2c3m2-xfer YYi2s_2ch_0i2s-2ch-0-mclk Vi2s-2ch-0-sclk V>6i2s-2ch-0-lrckV>7i2s-2ch-0-sdoV>9i2s-2ch-0-sdiV>8i2s_8ch_0i2s-8ch-0-mclkVi2s-8ch-0-sclktxVi2s-8ch-0-sclkrxVi2s-8ch-0-lrcktxVi2s-8ch-0-lrckrxVi2s-8ch-0-sdo0 Vi2s-8ch-0-sdo1 Vi2s-8ch-0-sdo2 Vi2s-8ch-0-sdo3 Vi2s-8ch-0-sdi0 Vi2s-8ch-0-sdi1Vi2s-8ch-0-sdi2Vi2s-8ch-0-sdi3Vi2s_8ch_1_m0i2s-8ch-1-m0-mclkVi2s-8ch-1-m0-sclktxVi2s-8ch-1-m0-sclkrxVi2s-8ch-1-m0-lrcktxVi2s-8ch-1-m0-lrckrxVi2s-8ch-1-m0-sdo0Vi2s-8ch-1-m0-sdo1-sdi3Vi2s-8ch-1-m0-sdo2-sdi2 Vi2s-8ch-1-m0-sdo3_sdi1 Vi2s-8ch-1-m0-sdi0 Vi2s_8ch_1_m1i2s-8ch-1-m1-mclk Vi2s-8ch-1-m1-sclktx Vi2s-8ch-1-m1-sclkrxVi2s-8ch-1-m1-lrcktxVi2s-8ch-1-m1-lrckrxVi2s-8ch-1-m1-sdo0Vi2s-8ch-1-m1-sdo1-sdi3Vi2s-8ch-1-m1-sdo2-sdi2Vi2s-8ch-1-m1-sdo3_sdi1Vi2s-8ch-1-m1-sdi0Vpdm_m0pdm-m0-clkVpdm-m0-sdi0 Vpdm-m0-sdi1 Vpdm-m0-sdi2 Vpdm-m0-sdi3Vpdm_m1pdm-m1-clkVpdm-m1-sdi0Vpdm-m1-sdi1Vpdm-m1-sdi2Vpdm-m1-sdi3Vpdm_m2pdm-m2-clkmVpdm-m2-clkVpdm-m2-sdi0 Vpdm-m2-sdi1Vpdm-m2-sdi2Vpdm-m2-sdi3Vpwm0pwm0-pin Vpwm0-pin-pull-down Z>1pwm1pwm1-pinV>2pwm1-pin-pull-downZpwm2pwm2-pinV>3pwm2-pin-pull-downZpwm3pwm3-pinV>4pwm3-pin-pull-downZpwm4pwm4-pinV>-pwm4-pin-pull-downZpwm5pwm5-pinVpwm5-pin-pull-downZ>.pwm6pwm6-pinV>/pwm6-pin-pull-downZpwm7pwm7-pinV>0pwm7-pin-pull-downZpwm8pwm8-pin V>)pwm8-pin-pull-down Zpwm9pwm9-pin V>*pwm9-pin-pull-down Zpwm10pwm10-pin V>+pwm10-pin-pull-down Zpwm11pwm11-pinV>,pwm11-pin-pull-downZrtcrtc-32kV>Ssdmmcsdmmc-clk[>=sdmmc-cmd\>>sdmmc-det\>?sdmmc-pwren[sdmmc-bus1\sdmmc-bus4@\\\\>@sdiosdio-clkT>Esdio-cmdU>Dsdio-pwrenTsdio-wrptTsdio-intnTsdio-bus1Usdio-bus4@UUUU>Cspdif_inspdif-inVspdif_outspdif-outV>:spi0spi0-clk\>spi0-csn0\>spi0-miso\>spi0-mosi\>spi1spi1-clk \> spi1-csn0 \>!spi1-miso \>"spi1-mosi \>#spi1-m1spi1m1-miso\spi1m1-mosi\spi1m1-clk\spi1m1-csn0 \spi2spi2-clk\>%spi2-csn0\>&spi2-miso\>'spi2-mosi\>(tsadctsadc-otp-pin Vtsadc-otp-out Vuart0uart0-xfer ]]>uart0-ctsV>uart0-rtsV>uart0-rts-pinVuart1uart1-xfer ]]>uart1-ctsV>uart1-rtsV>uart2-m0uart2m0-xfer ]]>uart2-m1uart2m1-xfer ]]uart3uart3-xfer  ] ]>uart3-m1uart3m1-xfer ]]uart4uart4-xfer  ]]>uart4-ctsV>uart4-rtsV>uart4-rts-pinVir-receiverir-recv-pinV>_buttonspwr-key]chosenserial2:1500000n8ir-receivergpio-ir-receiver ^default_ir_tx pwm-ir-tx`aleds gpio-ledsled-0firefly:red:powerir-power-clickon ^led-1firefly:blue:userir-user-clickoff ^ typec-vcc5vregulator-fixed typec_vcc5vLK@LK@$>avcc5v0-sysregulator-fixed vcc5v0_sysLK@LK@$6a>bvcc-ioregulator-fixedvcc_io2Z2Z$6b>dvcc-sdmmcregulator-gpio vcc_sdmmcw@2Z ^w@2Z6b>Bvcc-sdregulator-fixed Acvcc_sd2Z2Z$6d>Avdd-corepwm-regulatore vdd_core xr`F$db>vdd-logregulator-fixedvdd_log$6b compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1device_typeregenable-methodclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-idle-statesnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsoffsetmode-bootloadermode-loadermode-normalmode-recoverymode-fastbootassigned-clocksassigned-clock-parentsclock-namesstatusinterrupt-names#phy-cellspinctrl-namespinctrl-0reg-shiftreg-io-widthdmasdma-names#pwm-cells#io-channel-cellsresetsreset-namesarm,pl330-periph-burst#dma-cellsrockchip,grfdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesbus-widthfifo-depthmax-frequencycap-mmc-highspeedcap-sd-highspeedcard-detect-delaysd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs200-1_8vnon-removableassigned-clock-ratesphy-mode#reset-cells#sound-dai-cells#interrupt-cellsinterrupt-controllerrangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathgpiospwmslabellinux,default-triggerdefault-stateregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplygpioregulator-settling-time-up-uspwm-supply