+8( tpine64,rock64rockchip,rk3328 +7Pine64 Rock64aliases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000/ethernet@ff540000/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci@&3@@R_p{ cpu@1cpuarm,cortex-a53xpsci@&3@@R_p{ cpu@2cpuarm,cortex-a53xpsci@&3@@R_p{ cpu@3cpuarm,cortex-a53xpsci@&3@@R_p{ idle-statespscicpu-sleeparm,idle-statex{l2-cachecache @({opp-table-0operating-points-v2{opp-408000000Q~$@5opp-600000000#F~$@opp-8160000000,B@$@opp-1008000000<$@opp-1200000000G($@opp-1296000000M?d $@analog-soundsimple-audio-cardAi2sZtAnalogokaysimple-audio-card,cpusimple-audio-card,codecarm-pmuarm,cortex-a53-pmu0defg display-subsystemrockchip,display-subsystem hdmi-soundsimple-audio-cardAi2sZtHDMIokaysimple-audio-card,cpusimple-audio-card,codecpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0   xin24m fixed-clockn6xin24m{Ei2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s )7i2s_clki2s_hclk  txrx okay{i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s *8i2s_clki2s_hclktxrx okay{i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s +9i2s_clki2s_hclktxrx  disabledspdif@ff030000rockchip,rk3328-spdif .: mclkhclk txdefault* okay{hpdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclkrxdefaultsleep*4 disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd{9io-domains"rockchip,rk3328-io-voltage-domainokay>LZhvgpiorockchip,rk3328-grf-gpio{Dpower-controller!rockchip,rk3328-power-controller+{;power-domain@6power-domain@5 BABpower-domain@8Freboot-modesyscon-reboot-modeRBRBRB RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart 7&baudclkapb_pclktxrxdefault * !  disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart 8'baudclkapb_pclktxrxdefault *"#$  disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart 9(baudclkapb_pclktxrxdefault*% okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c $+7 i2cpclkdefault*& disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c %+8 i2cpclkdefault*'okaypmic@18rockchip,rk805 (xin32krk805-clkout2default*)#DR*^*j*v**{gregulatorsDCDC_REG1 vdd_logic 4 0regulator-state-mem,B@DCDC_REG2vdd_arm 4 0{regulator-state-mem,~DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vcc_io2Z2Z{regulator-state-mem,2ZLDO_REG1vcc_18w@w@{regulator-state-mem,w@LDO_REG2 vcc18_emmcw@w@{regulator-state-mem,w@LDO_REG3vdd_10B@B@regulator-state-mem,B@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c &+9 i2cpclkdefault*+ disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c '+: i2cpclkdefault*, disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi 1+ spiclkapb_pclk txrxdefault*-./0okayflash@0jedec,spi-norHwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt (pwm@ff1b0000rockchip,rk3328-pwm< pwmpclkdefault*1Z disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclkdefault*2Z disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclkdefault*3Z disabledpwm@ff1b0030rockchip,rk3328-pwm0< pwmpclkdefault*4Z disableddma-controller@ff1f0000arm,pl330arm,primecell@e apb_pclk|{thermal-zonessoc-thermal5tripstrip-point0ppassivetrip-point1Lpassive{6soc-crits criticalcooling-mapsmap060 tsadc@ff250000rockchip,rk3328-tsadc% :$P$tsadcapb_pclkinitdefaultsleep*748*74B ;tsadc-apbG9Tkokay{5efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efuse id@7cpu-leakage@17logic-leakage@19cpu-version@1a{Fadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( P%saradcapb_pclk4V ;saradc-apb disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500TZW]XY[\"gpgpmmupppp0ppmmu0pp1ppmmu1 buscore4fiommu@ff330200rockchip,iommu3 ` aclkiface disablediommu@ff340800rockchip,iommu4@ bF aclkiface disabledvideo-codec@ff350000rockchip,rk3328-vpu5  vdpuF aclkhclk:;iommu@ff350800rockchip,iommu5@  F aclkiface;{:video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6  BABaxiahbcabaccoreAB ׄׄ<;iommu@ff360480rockchip,iommu 6@6@ JB aclkiface;{<vop@ff370000rockchip,rk3328-vop7>  x;aclk_vopdclk_vophclk_vop4 ;axiahbdclk=okayport+{ endpoint@0>{Ciommu@ff373f00rockchip,iommu7?  ; aclkifaceokay{=hdmi@ff3c0000rockchip,rk3328-dw-hdmi< #GFiahbisfrcec ?%hdmidefault *@ABG9 okay{ports+port@0endpointC{>port@1codec@ff410000rockchip,rk3328-codecA* pclkmclkG9 okay /D{phy@ff430000rockchip,rk3328-hdmi-phyC SEysysclkrefoclkrefpclk hdmi_phy:F Fcpu-versionWokay{?clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconDG9bx=&'(ABDC"\5H4$ozEEE|n6n6n6ׄn6#FLGрxhxhрxhxh{syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyEphyclk usb480m_phy{oGokay{Gotg-portW$;<=otg-bvalidotg-idlinestateokay{Vhost-portW > linestateokay{Wmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@   =!JNbiuciuciu-driveciu-sampleLрokaydefault*HIJKLmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@   >"KObiuciuciu-driveciu-sampleLр disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@  ?#LPbiuciuciu-driveciu-sampleLрokaydefault *MNOethernet@ff540000rockchip,rk3328-gmacT macirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac4c ;stmmacethG9 okaydfoPP&input3>rgmiidefault*QG bRr 'P$ethernet@ff550000rockchip,rk3328-gmacUG9 macirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphy4b ;stmmaceth>rmiiS &output disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22V4ddefault*TU{Susb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X Motghost@  V %usb2-phyokayusb@ff5c0000 generic-ehci\  NG W%usbokayusb@ff5d0000 generic-ohci]  NG W%usbokayusb@ff600000rockchip,rk3328-dwc3snps,dwc3` C`aref_clksuspend_clkbus_clkhost utmi_wide  . F h  okayinterrupt-controller@ff811000 arm,gic-400  @ @ `   {crypto@ff060000rockchip,rk3328-crypto@ PQ;hclk_masterhclk_slavesclk4D ;crypto-rstpinctrlrockchip,rk3328-pinctrlG9+ gpio@ff210000rockchip,gpio-bank! 3  {cgpio@ff220000rockchip,gpio-bank" 4  {Rgpio@ff230000rockchip,gpio-bank# 5  {(gpio@ff240000rockchip,gpio-bank$ 6  pcfg-pull-up {Zpcfg-pull-down {bpcfg-pull-none {Xpcfg-pull-none-2ma  {apcfg-pull-up-2ma  pcfg-pull-up-4ma  {[pcfg-pull-none-4ma  {^pcfg-pull-down-4ma  pcfg-pull-none-8ma  {\pcfg-pull-up-8ma  {]pcfg-pull-none-12ma   {_pcfg-pull-up-12ma   {`pcfg-output-high pcfg-output-low ,pcfg-input-high  7{Ypcfg-input 7i2c0i2c0-xfer DXX{&i2c1i2c1-xfer DXX{'i2c2i2c2-xfer D XX{+i2c3i2c3-xfer DXX{,i2c3-pins DXXhdmi_i2chdmii2c-xfer DXX{Apdm-0pdmm0-clk DX{pdmm0-fsync DXpdmm0-sdi0 DX{pdmm0-sdi1 DX{pdmm0-sdi2 DX{pdmm0-sdi3 DX{pdmm0-clk-sleep DY{pdmm0-sdi0-sleep DY{pdmm0-sdi1-sleep DY{pdmm0-sdi2-sleep DY{pdmm0-sdi3-sleep DY{pdmm0-fsync-sleep DYtsadcotp-pin D X{7otp-out D X{8uart0uart0-xfer D XZ{uart0-cts D X{ uart0-rts D X{!uart0-rts-pin D Xuart1uart1-xfer DXZ{"uart1-cts DX{#uart1-rts DX{$uart1-rts-pin DXuart2-0uart2m0-xfer DXZuart2-1uart2m1-xfer DXZ{%spi0-0spi0m0-clk DZspi0m0-cs0 D Zspi0m0-tx D Zspi0m0-rx D Zspi0m0-cs1 D Zspi0-1spi0m1-clk DZspi0m1-cs0 DZspi0m1-tx DZspi0m1-rx DZspi0m1-cs1 DZspi0-2spi0m2-clk DZ{-spi0m2-cs0 DZ{0spi0m2-tx DZ{.spi0m2-rx DZ{/i2s1i2s1-mclk DXi2s1-sclk DXi2s1-lrckrx DXi2s1-lrcktx DXi2s1-sdi DXi2s1-sdo DXi2s1-sdio1 DXi2s1-sdio2 DXi2s1-sdio3 DXi2s1-sleep DYYYYYYYYYi2s2-0i2s2m0-mclk DXi2s2m0-sclk DXi2s2m0-lrckrx DXi2s2m0-lrcktx DXi2s2m0-sdi DXi2s2m0-sdo DXi2s2m0-sleep` DYYYYYYi2s2-1i2s2m1-mclk DXi2s2m1-sclk DXi2sm1-lrckrx DXi2s2m1-lrcktx DXi2s2m1-sdi DXi2s2m1-sdo DXi2s2m1-sleepP DYYYYYspdif-0spdifm0-tx DX{spdif-1spdifm1-tx DXspdif-2spdifm2-tx DXsdmmc0-0sdmmc0m0-pwren D[sdmmc0m0-pin D[sdmmc0-1sdmmc0m1-pwren D[sdmmc0m1-pin D[{dsdmmc0sdmmc0-clk D\{Hsdmmc0-cmd D]{Isdmmc0-dectn D[{Jsdmmc0-wrprt D[sdmmc0-bus1 D]sdmmc0-bus4@ D]]]]{Ksdmmc0-pins D[[[[[[[[sdmmc0extsdmmc0ext-clk D^sdmmc0ext-cmd D[sdmmc0ext-wrprt D[sdmmc0ext-dectn D[sdmmc0ext-bus1 D[sdmmc0ext-bus4@ D[[[[sdmmc0ext-pins D[[[[[[[[sdmmc1sdmmc1-clk D \sdmmc1-cmd D ]sdmmc1-pwren D]sdmmc1-wrprt D]sdmmc1-dectn D]sdmmc1-bus1 D]sdmmc1-bus4@ D]]]]sdmmc1-pins D [ [[[[[[[[emmcemmc-clk D_{Memmc-cmd D`{Nemmc-pwren DXemmc-rstnout DXemmc-bus1 D`emmc-bus4@ D````emmc-bus8 D````````{Opwm0pwm0-pin DX{1pwm1pwm1-pin DX{2pwm2pwm2-pin DX{3pwmirpwmir-pin DX{4gmac-1rgmiim1-pins` D \ ^^\^^^ ^ ^\ \^^\\\ \^\\\\{Qrmiim1-pins Da_aaaa a a_ _ X XXXXXgmac2phyfephyled-speed10 DXfephyled-duplex DXfephyled-rxm1 DX{Tfephyled-txm1 DXfephyled-linkm1 DX{Utsadc_pintsadc-int D Xtsadc-pin D Xhdmi_pinhdmi-cec DX{@hdmi-hpd Db{Bcif-0dvp-d2d9-m0 DXXXXX X X XXXXXcif-1dvp-d2d9-m1 DXXXXXXXXXXXXirir-int DX{fpmicpmic-int-l DZ{)usb2usb20-host-drv DX{echosen Rserial2:1500000n8external-gmac-clock fixed-clocksY@ gmac_clkin{Psdmmc-regulatorregulator-fixed mcdefault*dvcc_sd2Z2Z ^{Lvcc-host-5v-regulatorregulator-fixed mcdefault*e vcc_host_5v ^*vcc-sysregulator-fixedvcc_sysLK@LK@{*ir-receivergpio-ir-receiver 4(*fdefaultleds gpio-ledsled-0 4g immc0led-1 4g iheartbeatspdif-soundsimple-audio-cardtSPDIFsimple-audio-card,cpuhsimple-audio-card,codecispdif-ditlinux,spdif-dit {i compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1vccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplypmuio-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltspi-max-frequency#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesmute-gpiosnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplymmc-hs200-1_8vnon-removablevqmmc-supplytx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-supplyphy-modesnps,force_thresh_dma_modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlephy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathvin-supplylinux,default-trigger