8@( $rockchip,rk3399-evbrockchip,rk3399 +!7Rockchip RK3399 Evaluation Boardaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/spi@ff1c0000/spi@ff1d0000/spi@ff1e0000/spi@ff350000/spi@ff1f0000/spi@ff200000/ethernet@fe300000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53psci(dB R_@q~@ cpu@1cpuarm,cortex-a53psci(dB R_@q~@ cpu@2cpuarm,cortex-a53psci(dB R_@q~@ cpu@3cpuarm,cortex-a53psci(dB R_@q~@ cpu@100cpuarm,cortex-a72psci (B R_@q~@ thermal-idle'cpu@101cpuarm,cortex-a72psci (B R_@q~@ thermal-idle'l2-cache-cluster0cacheTa@s l2-cache-cluster1cacheTa@s idle-statespscicpu-sleeparm,idle-state.x? cluster-sleeparm,idle-state.? display-subsystemrockchip,display-subsystemP memory-controllerrockchip,rk3399-dmcVcrdmc_clk ~disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24m{pcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ Graclkaclk-perfhclkpm0123syslegacyclient`+9H P,Upcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38_8f(mcoremgmtmgmt-stickypipepmpclkaclk ~disabled y defaultinterrupt-controllerpcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base Graclkaclk-perfhclkpm8f(mcoremgmtmgmt-stickypipepmpclkaclk P,Upcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 default ~disabledethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMrstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macf mstmmaceth~okay 2input?Jrgmiidefault Sc y'P(mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mrbiuciuciu-driveciu-samplefymreset ~disabledmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр   Lrbiuciuciu-driveciu-samplefzmreset ~disabledmmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13  N Nrclk_xinclk_ahbemmc_cardclockP Uphy_arasan~okay(}usb@fe380000 generic-ehci8P Uusb~okayusb@fe3a0000 generic-ohci:P Uusb~okayusb@fe3c0000 generic-ehci<!P"Uusb~okayusb@fe3e0000 generic-ohci> !P"Uusb~okaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM rapb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M rapb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M rapb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M rapb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL rapb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL rapb_pclkusb@fe800000rockchip,rk3399-dwc3+_0Grref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkf% musb3-otg ~disabledusb@fe800000 snps,dwc3irrefbus_earlysuspend6otgP#$Uusb2-phyusb3-phy >utmi_wideG_ ~disabledusb@fe900000rockchip,rk3399-dwc3+_0Grref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkf& musb3-otg ~disabledusb@fe900000 snps,dwc3nrrefbus_earlysuspend6otgP%&Uusb2-phyusb3-phy >utmi_wideG_ ~disableddp@fec00000rockchip,rk3399-cdn-dp  r  ruorcore-clkpclkspdifgrfP'( fHJmspdifdptxapbcore ~disabledportsport+endpoint@0)endpoint@1*interrupt-controller@fee00000 arm,gic-v3+_P  msi-controller@fee20000arm,gic-v3-its ppi-partitionsinterrupt-partition-0interrupt-partition-1saradc@ff100000rockchip,rk3399-saradc> Persaradcapb_pclkf msaradc-apb ~disabledcrypto@ff8b0000rockchip,rk3399-crypto@rhclk_masterhclk_slavesclkfmmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@rhclk_masterhclk_slavesclkfmmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c A AU ri2cpclk;default++ ~disabledi2c@ff120000rockchip,rk3399-i2c B BV ri2cpclk#default,+ ~disabledi2c@ff130000rockchip,rk3399-i2c C CW ri2cpclk"default-+ ~disabledi2c@ff140000rockchip,rk3399-i2c D DX ri2cpclk&default.+ ~disabledi2c@ff150000rockchip,rk3399-i2c E EY ri2cpclk%default/+ ~disabledi2c@ff160000rockchip,rk3399-i2c F FZ ri2cpclk$default0+ ~disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`rbaudclkapb_pclkc2<default1 ~disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRarbaudclkapb_pclkb2<default2 ~disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbrbaudclkapb_pclkd2<default3~okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcrbaudclkapb_pclke2<default4 ~disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[rspiclkapb_pclkDI5 5 Ntxrxdefault6789+ ~disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\rspiclkapb_pclk5I5 5 Ntxrxdefault:;<=+ ~disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]rspiclkapb_pclk4I55Ntxrxdefault>?@A+ ~disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^rspiclkapb_pclkCI55NtxrxdefaultBCDE+ ~disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_rspiclkapb_pclkIFF NtxrxdefaultGHIJ+ ~disabledthermal-zonescpu-thermalXdn|Ktripscpu_alert0ppassiveLcpu_alert1$passiveMcpu_crits criticalcooling-mapsmap0Lmap1MHgpu-thermalXdn|Ktripsgpu_alert0$passiveNgpu_crits criticalcooling-mapsmap0N Otsadc@ff260000rockchip,rk3399-tsadc&a O qOdrtsadcapb_pclkf mtsadc-apbsinitdefaultsleepPQP ~disabledKqos@ffa58000rockchip,rk3399-qossyscon Yqos@ffa5c000rockchip,rk3399-qossyscon Zqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon ]qos@ffa70080rockchip,rk3399-qossyscon ^qos@ffa74000rockchip,rk3399-qossyscon@ [qos@ffa76000rockchip,rk3399-qossyscon` \qos@ffa90000rockchip,rk3399-qossyscon _qos@ffa98000rockchip,rk3399-qossyscon Rqos@ffaa0000rockchip,rk3399-qossyscon `qos@ffaa0080rockchip,rk3399-qossyscon aqos@ffaa8000rockchip,rk3399-qossyscon bqos@ffaa8080rockchip,rk3399-qossyscon cqos@ffab0000rockchip,rk3399-qossyscon Sqos@ffab0080rockchip,rk3399-qossyscon Tqos@ffab8000rockchip,rk3399-qossyscon Uqos@ffac0000rockchip,rk3399-qossyscon Vqos@ffac0080rockchip,rk3399-qossyscon Wqos@ffac8000rockchip,rk3399-qossyscon dqos@ffac8080rockchip,rk3399-qossyscon eqos@ffad0000rockchip,rk3399-qossyscon fqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon Xpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+power-domain@34" Rpower-domain@33! STpower-domain@31 Upower-domain@32   VWpower-domain@35# Xpower-domain@25lpower-domain@23 Ypower-domain@22f Zpower-domain@27L [power-domain@28 \power-domain@8~}power-domain@9 power-domain@24 ]^power-domain@15+power-domain@21r _power-domain@19 `apower-domain@20 bcpower-domain@16+power-domain@17 depower-domain@18 fsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2io-domains&rockchip,rk3399-pmu-io-voltage-domain ~disabledspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5ggrspiclkapb_pclk<defaulthijk+ ~disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7gg"rbaudclkapb_pclkf2<defaultl ~disabledi2c@ff3c0000rockchip,rk3399-i2c< g  g g ri2cpclk9defaultm+~okaypmic@1brockchip,rk808 ndefaulto4rk808-clkout1rk808-clkout2BpNpZpfprp~ppppppqregulatorsDCDC_REG1vdd_log qpq*>regulator-state-memPh DCDC_REG2 vdd_cpu_l qpq*>regulator-state-memDCDC_REG3vcc_ddr*>regulator-state-memPDCDC_REG4vcc_1v8w@w@*>regulator-state-memPhw@LDO_REG1 vcc1v8_dvpw@w@*>regulator-state-memLDO_REG2 vcc3v0_tp--*>regulator-state-memLDO_REG3 vcc1v8_pmuw@w@*>qregulator-state-memPhw@LDO_REG4vcc_sdw@-*>regulator-state-memPh-LDO_REG5vcca3v0_codec--*>regulator-state-memLDO_REG6vcc_1v5``*>regulator-state-memPh`LDO_REG7vcca1v8_codecw@w@*>regulator-state-memLDO_REG8vcc_3v0--*>regulator-state-memPh-SWITCH_REG1 vcc3v3_s3*>regulator-state-memPSWITCH_REG2 vcc3v3_s0*>regulator-state-memregulator@40silergy,syr827@ vdd_cpu_b 4`*>rregulator-state-memregulator@41silergy,syr828Avdd_gpu 4`*>rregulator-state-memi2c@ff3d0000rockchip,rk3399-i2c= g  g g ri2cpclk8defaults+ ~disabledi2c@ff3e0000rockchip,rk3399-i2c> g  g g ri2cpclk:defaultt+ ~disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultug~okaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultvg ~disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultwg~okaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0defaultxg~okaydfi@ff630000c@rockchip,rk3399-dfiVy rpclk_ddr_monvideo-codec@ff650000rockchip,rk3399-vpue rq vepuvdpu raclkhclkyiommu@ff650800rockchip,iommue@s raclkifaceyvideo-codec@ff660000rockchip,rk3399-vdecft raxiahbcabaccorez iommu@ff660480rockchip,iommu f@f@u raclkiface ziommu@ff670800rockchip,iommug@* raclkiface ~disabledrga@ff680000rockchip,rk3399-rgah7mraclkhclksclkfjgi mcoreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} rpclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@  rapb_pclkFdma-controller@ff6e0000arm,pl330arm,primecelln@  rapb_pclk5clock-controller@ff750000rockchip,rk3399-pmucruu{rxin24m  g(Jgclock-controller@ff760000rockchip,rk3399-cruv{rxin24m  @BCxD#g/;рxh<4`#Fׄׄ ׄsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domain ~disabledmipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wordphy-refdphy-cfggrf  ~disabledusb2phy@e450rockchip,rk3399-usb2phyP{rphyclkclk_usbphy0_480m~okayhost-port  linestate~okay?| otg-port 0ghjotg-bvalidotg-idlinestate ~disabled#usb2phy@e460rockchip,rk3399-usb2phy`|rphyclkclk_usbphy1_480m~okay!host-port  linestate~okay?|"otg-port 0lmootg-bvalidotg-idlinestate ~disabled%phy@f780rockchip,rk3399-emmc-phy$}remmcclk 2 ~okaypcie-phyrockchip,rk3399-pcie-phyrrefclk fmphy ~disabledphy@ff7c0000rockchip,rk3399-typec-phy|~}rtcpdcoretcpdphy-ref ~fLmuphyuphy-pipeuphy-tcphy ~disableddp-port 'usb3-port $phy@ff800000rockchip,rk3399-typec-phyrtcpdcoretcpdphy-ref  fMmuphyuphy-pipeuphy-tcphy ~disableddp-port (usb3-port &watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ rpclktimerspdif@ff870000rockchip,rk3399-spdifBIFNtx rmclkhclkUdefault~ ~disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'IFFNtxrxri2s_clki2s_hclkVbclk_onbclk_off ~disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(IFFNtxrxri2s_clki2s_hclkWdefault ~disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)IFFNtxrxri2s_clki2s_hclkX ~disabledvop@ff8f0000rockchip,rk3399-vop-lit w ׄraclk_vopdclk_vophclk_vopf maxiahbdclk ~disabledport+ endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4*iommu@ff8f3f00rockchip,iommu?w raclkiface ~disabledvop@ff900000rockchip,rk3399-vop-big v ׄraclk_vopdclk_vophclk_vopf maxiahbdclk~okayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4)iommu@ff903f00rockchip,iommu?v raclkiface~okayisp0@ff910000rockchip,rk3399-cif-isp@+nrispaclkhclkPUdphy ~disabledports+port@0+iommu@ff914000rockchip,iommu @P+ raclkiface 2isp1@ff920000rockchip,rk3399-cif-isp@,orispaclkhclkPUdphy ~disabledports+port@0+iommu@ff924000rockchip,iommu @P, raclkiface 2hdmi-soundsimple-audio-card Mi2s f hdmi-sound ~disabledsimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi<(tqporiahbisfrcecgrfref ~disabledports+port@0+endpoint@0endpoint@1port@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porrefpclkphy_cfggrffmapb+ ~disabledports+port@0+endpoint@0endpoint@1port@1dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorrefpclkphy_cfggrffmapb+  ~disabledports+port@0+endpoint@0endpoint@1port@1dp@ff970000rockchip,rk3399-edp jlo rdppclkgrfdefaultfmdp~okay ports+port@0+endpoint@0endpoint@1port@1+endpoint@0gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 jobmmugpu( P# ~disabledOpinctrlrockchip,rk3399-pinctrlV+_gpio@ff720000rockchip,gpio-bankrg  gpio@ff730000rockchip,gpio-banksg  ngpio@ff780000rockchip,gpio-bankxP  gpio@ff788000rockchip,gpio-bankxQ  gpio@ff790000rockchip,gpio-bankyR  pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma  pcfg-pull-none-13ma  pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma  pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low pcfg-input-enable pcfg-input-pull-up  pcfg-input-pull-down  clockclk-32k #cifcif-clkin # cif-clkouta # edpedp-hpd #gmacrgmii-pins #    rmii-pins #     i2c0i2c0-xfer #mi2c1i2c1-xfer #+i2c2i2c2-xfer #,i2c3i2c3-xfer #-i2c4i2c4-xfer #  si2c5i2c5-xfer #  .i2c6i2c6-xfer #  /i2c7i2c7-xfer #0i2c8i2c8-xfer #ti2s0i2s0-2ch-bus` #i2s0-2ch-bus-bclk-off` #i2s0-8ch-bus #i2s0-8ch-bus-bclk-off #i2s1i2s1-2ch-busP #i2s1-2ch-bus-bclk-offP #sdio0sdio0-bus1 #sdio0-bus4@ #sdio0-cmd #sdio0-clk #sdio0-cd #sdio0-pwr #sdio0-bkpwr #sdio0-wp #sdio0-int #sdmmcsdmmc-bus1 #sdmmc-bus4@ #   sdmmc-clk # sdmmc-cmd # sdmmc-cd #sdmmc-wp #suspendap-pwroff #ddrio-pwroff #spdifspdif-bus #~spdif-bus-1 #spi0spi0-clk #6spi0-cs0 #9spi0-cs1 #spi0-tx #7spi0-rx #8spi1spi1-clk # :spi1-cs0 # =spi1-rx #<spi1-tx #;spi2spi2-clk # >spi2-cs0 # Aspi2-rx # @spi2-tx # ?spi3spi3-clk #hspi3-cs0 #kspi3-rx #jspi3-tx #ispi4spi4-clk #Bspi4-cs0 #Espi4-rx #Dspi4-tx #Cspi5spi5-clk #Gspi5-cs0 #Jspi5-rx #Ispi5-tx #Htestclktest-clkout0 #test-clkout1 #test-clkout2 #tsadcotp-pin #Potp-out #Quart0uart0-xfer #1uart0-cts #uart0-rts #uart1uart1-xfer #  2uart2auart2a-xfer # uart2buart2b-xfer #uart2cuart2c-xfer #3uart3uart3-xfer #4uart3-cts #uart3-rts #uart4uart4-xfer #luarthdcpuarthdcp-xfer #pwm0pwm0-pin #upwm0-pin-pull-down #vop0-pwm-pin #vop1-pwm-pin #pwm1pwm1-pin #vpwm1-pin-pull-down #pwm2pwm2-pin #wpwm2-pin-pull-down #pwm3apwm3a-pin #xpwm3bpwm3b-pin #hdmihdmi-i2c-xfer #hdmi-cec #pciepci-clkreqn-cpm #pci-clkreqnb-cpm #pmicpmic-int-l #ousb2vcc5v0-host-en #backlightpwm-backlight 1  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ C \aedp-panellg,lp079qx1-sp0v a kn  xportendpointexternal-gmac-clock fixed-clocksY@ clkin_gmacvdd-centerpwm-regulator \a vdd_center 5\*>~okayvcc3v3-sysregulator-fixed vcc3v3_sys*>2Z2Zpvcc5v0-sysregulator-fixed vcc5v0_sys*>LK@LK@rvcc5v0-host-regulatorregulator-fixed  ^default vcc5v0_hostr|vcc-phy-regulatorregulator-fixedvcc_phy*> compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachephandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllermax-functionsrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesarasan,soc-ctl-syscondisable-cqe-dcmdbus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cells#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiforce-hpdgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsbrightness-levelsdefault-brightness-levelpwmsbacklightenable-gpiospower-supplyenable-active-high