8( 'friendlyarm,nanopi-m4brockchip,rk3399 +7FriendlyElec NanoPi M4Baliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/spi@ff1c0000/spi@ff1d0000/spi@ff1e0000/spi@ff350000/spi@ff1f0000/spi@ff200000/ethernet@fe300000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53psci #2dL \i@{@   cpu@1cpuarm,cortex-a53psci #2dL \i@{@   cpu@2cpuarm,cortex-a53psci #2dL \i@{@   cpu@3cpuarm,cortex-a53psci #2dL \i@{@   cpu@100cpuarm,cortex-a72psci  #2L \i@{@thermal-idle#'cpu@101cpuarm,cortex-a72psci  #2L \i@{@thermal-idle#'l2-cache-cluster0cache^k@} l2-cache-cluster1cache^k@}idle-states"pscicpu-sleeparm,idle-state/@Wxh cluster-sleeparm,idle-state/@Wh display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ ' Gaclkaclk-perfhclkpm01231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclkokayinterrupt-controller pcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base Gaclkaclk-perfhclkpm8(coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3  default disabledethernet@fe300000rockchip,rk3399-gmac0 1macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac% stmmaceth3@okayKbrinput default  !"#rgmii$(mdiosnps,dwmac-mdio+ethernet-phy@1 % 'u0 %#mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mbiuciuciu-driveciu-sample%yresetokay5&@ default '()Nmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aрb\  Lbiuciuciu-driveciu-sample%zresetokayq * default+,-.N/0mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 bN\ Nclk_xinclk_ahbemmc_cardclocky1 ~phy_arasan%okay@usb@fe380000 generic-ehci82y3~usbokayusb@fe3a0000 generic-ohci:2y3~usbokayusb@fe3c0000 generic-ehci<4y5~usbokayusb@fe3e0000 generic-ohci> 4y5~usbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspendotgy67~usb2-phyusb3-phy utmi_wide0Ij%okayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3nrefbus_earlysuspendhosty89~usb2-phyusb3-phy utmi_wide0Ij%okaydp@fec00000rockchip,rk3399-cdn-dp br\  ruocore-clkpclkspdifgrfy:;% HJspdifdptxapbcore3 disabledportsport+endpoint@0<endpoint@1=interrupt-controller@fee00000 arm,gic-v3 +P  msi-controller@fee20000arm,gic-v3-itsppi-partitionsinterrupt-partition-0interrupt-partition-1saradc@ff100000rockchip,rk3399-saradc>Pesaradcapb_pclk saradc-apbokaycrypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cbA\ AU i2cpclk; default>+okay @i2c@ff120000rockchip,rk3399-i2cbB\ BV i2cpclk# default?+okayi2c@ff130000rockchip,rk3399-i2cbC\ CW i2cpclk" default@+ disabledi2c@ff140000rockchip,rk3399-i2cbD\ DX i2cpclk& defaultA+ disabledi2c@ff150000rockchip,rk3399-i2cbE\ EY i2cpclk% defaultB+ disabledi2c@ff160000rockchip,rk3399-i2cbF\ FZ i2cpclk$ defaultC+okayserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkc' default DEFokaybluetoothbrcm,bcm43438-btGlpo 4H H* Z* i=  default IJKsLMserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkb' defaultN disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkd' defaultOokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclke' defaultP disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDQ Q txrx defaultRSTU+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5Q Q txrx defaultVWXY+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4QQtxrx defaultZ[\]+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCQQtxrx default^_`a+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkbb txrx defaultcdef%+ disabledthermal-zonescpu-thermaldgtripscpu_alert0ppassivehcpu_alert1$passiveicpu_crits criticalcooling-mapsmap0hmap1iHgpu-thermaldgtripsgpu_alert0$passivejgpu_crits criticalcooling-mapsmap0j ktsadc@ff260000rockchip,rk3399-tsadc&abO\ qOdtsadcapb_pclk tsadc-apb3s initdefaultsleeplml%okay;Rgqos@ffa58000rockchip,rk3399-qossyscon uqos@ffa5c000rockchip,rk3399-qossyscon vqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon yqos@ffa70080rockchip,rk3399-qossyscon zqos@ffa74000rockchip,rk3399-qossyscon@ wqos@ffa76000rockchip,rk3399-qossyscon` xqos@ffa90000rockchip,rk3399-qossyscon {qos@ffa98000rockchip,rk3399-qossyscon nqos@ffaa0000rockchip,rk3399-qossyscon |qos@ffaa0080rockchip,rk3399-qossyscon }qos@ffaa8000rockchip,rk3399-qossyscon ~qos@ffaa8080rockchip,rk3399-qossyscon qos@ffab0000rockchip,rk3399-qossyscon oqos@ffab0080rockchip,rk3399-qossyscon pqos@ffab8000rockchip,rk3399-qossyscon qqos@ffac0000rockchip,rk3399-qossyscon rqos@ffac0080rockchip,rk3399-qossyscon sqos@ffac8000rockchip,rk3399-qossyscon qos@ffac8080rockchip,rk3399-qossyscon qos@ffad0000rockchip,rk3399-qossyscon qos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon tpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controllerm+power-domain@34"nmpower-domain@33!opmpower-domain@31qmpower-domain@32  rsmpower-domain@35#tmpower-domain@25lmpower-domain@23umpower-domain@22fvmpower-domain@27Lwmpower-domain@28xmpower-domain@8~}mpower-domain@9 mpower-domain@24yzmpower-domain@15m+power-domain@21r{mpower-domain@19|}mpower-domain@20~mpower-domain@16m+power-domain@17mpower-domain@18msyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2io-domains&rockchip,rk3399-pmu-io-voltage-domainokayspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5spiclkapb_pclk< default+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7"baudclkapb_pclkf' default disabledi2c@ff3c0000rockchip,rk3399-i2c<b \   i2cpclk9 default+okayregulator@40silergy,syr827@ default 4` vdd_cpu_b  .Lregulator-state-mem 9regulator@41silergy,syr828A default 4` vdd_gpu  .Lregulator-state-mem 9pmic@1brockchip,rk808xin32krtc_clko_wifi  default  R s L L L L L L L L L L LGregulatorsDCDC_REG1 qp vdd_center qregulator-state-mem 9DCDC_REG2 qp vdd_cpu_l q regulator-state-mem 9DCDC_REG3 vcc_ddrregulator-state-mem DCDC_REG4w@w@ vcc_1v8Mregulator-state-mem  w@LDO_REG1w@w@ vcc1v8_camregulator-state-mem 9LDO_REG2-- vcc3v0_touchregulator-state-mem 9LDO_REG3w@w@ vcc1v8_pmupllregulator-state-mem  w@LDO_REG4w@2Z vcc_sdio0regulator-state-mem  -LDO_REG5-- vcca3v0_codecregulator-state-mem 9LDO_REG6`` vcc_1v5regulator-state-mem  `LDO_REG7w@w@ vcca1v8_codecregulator-state-mem 9LDO_REG8-- vcc_3v0regulator-state-mem  -SWITCH_REG1 vcc3v3_s3$regulator-state-mem 9SWITCH_REG2 vcc3v3_s0regulator-state-mem 9i2c@ff3d0000rockchip,rk3399-i2c=b \   i2cpclk8 default+ disabledi2c@ff3e0000rockchip,rk3399-i2c>b \   i2cpclk: default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB < defaultokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB < defaultokaypwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  < activeokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 < default disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_monvideo-codec@ff650000rockchip,rk3399-vpue rq 1vepuvdpu aclkhclk G%iommu@ff650800rockchip,iommue@s aclkiface N%video-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore G% iommu@ff660480rockchip,iommu f@f@u aclkiface%  Niommu@ff670800rockchip,iommug@* aclkiface N disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb%!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@  [ f apb_pclkbdma-controller@ff6e0000arm,pl330arm,primecelln@  [ f apb_pclkQclock-controller@ff750000rockchip,rk3399-pmucruuxin24m3 }b\(Jclock-controller@ff760000rockchip,rk3399-cruvxin24m3 }b@BCxD\#g/;рxh<4`#Fׄׄ ׄsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domainokay M  0 mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf%  disabledusb2phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480mokay2host-port  1linestateokay3otg-port 0ghj1otg-bvalidotg-idlinestateokay6usb2phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480mokay4host-port  1linestateokay5otg-port 0lmo1otg-bvalidotg-idlinestateokay8phy@f780rockchip,rk3399-emmc-phy$emmcclk 2 okay 1pcie-phyrockchip,rk3399-pcie-phyrefclk phyokayK\bphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-refb~\%Luphyuphy-pipeuphy-tcphy3okaydp-port :usb3-port 7phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refb\% Muphyuphy-pipeuphy-tcphy3okaydp-port ;usb3-port 9watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBbtx mclkhclkU default% disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s3'bbtxrxi2s_clki2s_hclkV bclk_onbclk_off% disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(bbtxrxi2s_clki2s_hclkW default% disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)bbtxrxi2s_clki2s_hclkX%okayvop@ff8f0000rockchip,rk3399-vop-lit wb\ׄaclk_vopdclk_vophclk_vop G% axiahbdclkokayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4=iommu@ff8f3f00rockchip,iommu?w aclkiface% Nokayvop@ff900000rockchip,rk3399-vop-big vb\ׄaclk_vopdclk_vophclk_vop G% axiahbdclkokayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4<iommu@ff903f00rockchip,iommu?v aclkiface% Nokayisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk Gy~dphy% disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface N% isp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk Gy~dphy% disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface N% hdmi-soundsimple-audio-card i2s 4 Nhdmi-soundokaysimple-audio-card,cpu esimple-audio-card,codec ehdmi@ff940000rockchip,rk3399-dw-hdmi'(tqpoiahbisfrcecgrfref%3okay o defaultports+port@0+endpoint@0endpoint@1port@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrf%apb3+ disabledports+port@0+endpoint@0endpoint@1port@1dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrf%apb3+  disabledports+port@0+endpoint@0endpoint@1port@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrf default%dp3 disabledports+port@0+endpoint@0endpoint@1port@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 1jobmmugpu#2 P%#okay {kpinctrlrockchip,rk3399-pinctrl3+gpio@ff720000rockchip,gpio-bankr   *gpio@ff730000rockchip,gpio-banks   gpio@ff780000rockchip,gpio-bankxP   Hgpio@ff788000rockchip,gpio-bankxQ   %gpio@ff790000rockchip,gpio-bankyR   pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma  pcfg-pull-none-13ma  pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma  pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low pcfg-input-enable pcfg-input-pull-up  pcfg-input-pull-down  clockclk-32k cifcif-clkin  cif-clkouta  edpedp-hpd gmacrgmii-pins      rmii-pins      phy-intb  !phy-rstb "i2c0i2c0-xfer i2c1i2c1-xfer >i2c2i2c2-xfer ?i2c3i2c3-xfer @i2c4i2c4-xfer   i2c5i2c5-xfer   Ai2c6i2c6-xfer   Bi2c7i2c7-xfer Ci2c8i2c8-xfer i2s0i2s0-2ch-bus` i2s0-2ch-bus-bclk-off` i2s0-8ch-bus i2s0-8ch-bus-bclk-off i2s1i2s1-2ch-busP i2s1-2ch-bus-bclk-offP sdio0sdio0-bus1 sdio0-bus4@ 'sdio0-cmd (sdio0-clk )sdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@    +sdmmc-clk  ,sdmmc-cmd  -sdmmc-cd sdmmc-wp sdmmc0-det-l .sdmmc0-pwr-h suspendap-pwroff ddrio-pwroff spdifspdif-bus spdif-bus-1 spi0spi0-clk Rspi0-cs0 Uspi0-cs1 spi0-tx Sspi0-rx Tspi1spi1-clk  Vspi1-cs0  Yspi1-rx Xspi1-tx Wspi2spi2-clk  Zspi2-cs0  ]spi2-rx  \spi2-tx  [spi3spi3-clk spi3-cs0 spi3-rx spi3-tx spi4spi4-clk ^spi4-cs0 aspi4-rx `spi4-tx _spi5spi5-clk cspi5-cs0 fspi5-rx espi5-tx dtestclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-pin lotp-out muart0uart0-xfer Duart0-cts Fuart0-rts Euart1uart1-xfer   Nuart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer Ouart3uart3-xfer Puart3-cts uart3-rts uart4uart4-xfer uarthdcpuarthdcp-xfer pwm0pwm0-pin pwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin pwm1-pin-pull-down pwm2pwm2-pin pwm2-pin-pull-down pwm3apwm3a-pin pwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec pciepci-clkreqn-cpm pci-clkreqnb-cpm fusb30xfusb0-int gpio-ledsstatus-led-pin pmiccpu-b-sleep gpu-sleep pmic-int-l rockchip-keypower-key sdiobt-host-wake-l Jbt-reg-on-h Ibt-wake-l Kwifi-reg_on-h opp-table-0operating-points-v2  opp00 Q   -@opp01 #F  opp02 0,  P Popp03 < HHopp04 G B@B@opp05 Tfr **opp-table-1operating-points-v2 opp00 Q   -@opp01 #F  opp02 0,  opp03 <  Y Yopp04 G ~~opp05 Tfr opp06 _" opp07 kI OOopp-table-2operating-points-v2opp00    0opp01 @  0opp02 ׄ  0opp03 e  Y Y0opp04 #F HH0opp05 / 0chosen >serial2:1500000n8external-gmac-clock fixed-clocksY@ clkin_gmacvcc3v3-sysregulator-fixed2Z2Z vcc3v3_sys .Lvcc5v0-sysregulator-fixedLK@LK@ vcc5v0_sys .vcc1v8-s3regulator-fixedw@w@ vcc1v8_s3 .Mvcc3v0-sdregulator-fixed J ]* default-- vcc3v0_sd .L/vcca0v9-s3regulator-fixed   vcca0v9_s3 .vcca1v8-s3regulator-fixedw@w@ vcca1v8_s3 .vbus-typecregulator-fixedLK@LK@ vbus_typec . J gpio-keys gpio-keys b defaultkey-power md * GPIO Key Power t sgpio-leds gpio-leds defaultled-0 *  status_led heartbeatsdio-pwrseqmmc-pwrseq-simpleG ext_clock default * &vdd-5vregulator-fixed vdd_5vvcc5v0-coreregulator-fixed vcc5v0_core .vcc5v0-usb1regulator-fixed vcc5v0_usb1 .vcc5v0-usb2regulator-fixed vcc5v0_usb2 .adc-keys adc-keys  buttons ` dbutton-recovery Recovery h FP compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesnum-lanesvpcie0v9-supplyvpcie1v8-supplyinterrupt-controllermax-functionsrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clock-parentsassigned-clocksclock_in_outphy-handlephy-modephy-supplytx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wpvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,enable-strobe-pulldownrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-active-highgpioautorepeatdebounce-intervallabellinux,codelinux,default-triggerio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervalpress-threshold-microvolt