f8( N(xunlong,rk3399-orangepirockchip,rk3399 +7Orange Pi RK3399 Boardaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/spi@ff1c0000/spi@ff1d0000/spi@ff1e0000/spi@ff350000/spi@ff1f0000/spi@ff200000/ethernet@fe300000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53psci #2dL \i@{@   cpu@1cpuarm,cortex-a53psci #2dL \i@{@   cpu@2cpuarm,cortex-a53psci #2dL \i@{@   cpu@3cpuarm,cortex-a53psci #2dL \i@{@   cpu@100cpuarm,cortex-a72psci  #2L \i@{@thermal-idle#'cpu@101cpuarm,cortex-a72psci  #2L \i@{@thermal-idle#'l2-cache-cluster0cache^k@} l2-cache-cluster1cache^k@}idle-states"pscicpu-sleeparm,idle-state/@Wxh cluster-sleeparm,idle-state/@Wh display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ ' Gaclkaclk-perfhclkpm01231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controller pcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base Gaclkaclk-perfhclkpm8(coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 default disabledethernet@fe300000rockchip,rk3399-gmac0 1macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmaceth okay+;Rinput_jrgmiisdefault  !"~(mdiosnps,dwmac-mdio+ethernet-phy@1 # 'u0 #mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@ Mbiuciuciu-driveciu-sampleyresetokay  $+default %&'9+wifi@1brcm,bcm4329-fmac ( 1host-wakedefault)mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр+G  Lbiuciuciu-driveciu-samplezresetokay\ n(рdefault*+,-w./mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 +NG Nclk_xinclk_ahbemmc_cardclocky0 ~phy_arasanokay+usb@fe380000 generic-ehci81y2~usbokayusb@fe3a0000 generic-ohci:1y2~usbokayusb@fe3c0000 generic-ehci<3y4~usbokayusb@fe3e0000 generic-ohci> 3y4~usbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspendhosty56~usb2-phyusb3-phy utmi_wide *Cdokayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3nrefbus_earlysuspendhosty78~usb2-phyusb3-phy utmi_wide *Cdokaydp@fec00000rockchip,rk3399-cdn-dp +rG  ruocore-clkpclkspdifgrfy9: HJspdifdptxapbcore disabledportsport+endpoint@0;endpoint@1<interrupt-controller@fee00000 arm,gic-v3 +P  msi-controller@fee20000arm,gic-v3-itsppi-partitionsinterrupt-partition-0interrupt-partition-1saradc@ff100000rockchip,rk3399-saradc>Pesaradcapb_pclk saradc-apbokay=crypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c+AG AU i2cpclk;default>+okayi2c@ff120000rockchip,rk3399-i2c+BG BV i2cpclk#default?+ disabledi2c@ff130000rockchip,rk3399-i2c+CG CW i2cpclk"default@+okayi2c@ff140000rockchip,rk3399-i2c+DG DX i2cpclk&defaultA+ disabledi2c@ff150000rockchip,rk3399-i2c+EG EY i2cpclk%defaultB+ disabledi2c@ff160000rockchip,rk3399-i2c+FG FZ i2cpclk$defaultC+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkc!default DEFokaybluetoothbrcm,bcm43438-btGlpo .H B( T( default IJKcLoMserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkb!defaultN disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkd!defaultOokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclke!defaultP disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkD|Q Q txrxdefaultRSTU+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5|Q Q txrxdefaultVWXY+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4|QQtxrxdefaultZ[\]+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkC|QQtxrxdefault^_`a+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk|bb txrxdefaultcdef+ disabledthermal-zonescpu-thermaldgtripscpu_alert0ppassivehcpu_alert1$passiveicpu_crits criticalcooling-mapsmap0hmap1iHgpu-thermaldgtripsgpu_alert0$passivejgpu_crits criticalcooling-mapsmap0j ktsadc@ff260000rockchip,rk3399-tsadc&a+OG qOdtsadcapb_pclk tsadc-apbsinitdefaultsleeplm lokay+Bgqos@ffa58000rockchip,rk3399-qossyscon uqos@ffa5c000rockchip,rk3399-qossyscon vqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon yqos@ffa70080rockchip,rk3399-qossyscon zqos@ffa74000rockchip,rk3399-qossyscon@ wqos@ffa76000rockchip,rk3399-qossyscon` xqos@ffa90000rockchip,rk3399-qossyscon {qos@ffa98000rockchip,rk3399-qossyscon nqos@ffaa0000rockchip,rk3399-qossyscon |qos@ffaa0080rockchip,rk3399-qossyscon }qos@ffaa8000rockchip,rk3399-qossyscon ~qos@ffaa8080rockchip,rk3399-qossyscon qos@ffab0000rockchip,rk3399-qossyscon oqos@ffab0080rockchip,rk3399-qossyscon pqos@ffab8000rockchip,rk3399-qossyscon qqos@ffac0000rockchip,rk3399-qossyscon rqos@ffac0080rockchip,rk3399-qossyscon sqos@ffac8000rockchip,rk3399-qossyscon qos@ffac8080rockchip,rk3399-qossyscon qos@ffad0000rockchip,rk3399-qossyscon qos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon tpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller]+power-domain@34"qn]power-domain@33!qop]power-domain@31qq]power-domain@32  qrs]power-domain@35#qt]power-domain@25l]power-domain@23qu]power-domain@22fqv]power-domain@27Lqw]power-domain@28qx]power-domain@8~}]power-domain@9 ]power-domain@24qyz]power-domain@15]+power-domain@21rq{]power-domain@19q|}]power-domain@20q~]power-domain@16]+power-domain@17q]power-domain@18q]syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2io-domains&rockchip,rk3399-pmu-io-voltage-domainokayxspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5spiclkapb_pclk<default+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7"baudclkapb_pclkf!default disabledi2c@ff3c0000rockchip,rk3399-i2c<+ G   i2cpclk9default+okaypmic@1brockchip,rk808 rtc_clko_socrtc_clko_wifidefaultLLLLLLL L L #L 0LoGregulatorsDCDC_REG1 =vdd_center L ` r ` ` qregulator-state-mem DCDC_REG2 =vdd_cpu_l L ` r ` ` q regulator-state-mem DCDC_REG3 =vcc_ddr L `regulator-state-mem DCDC_REG4 =vcc_1v8 L ` rw@ 2ZMregulator-state-mem  w@LDO_REG1 =vcc1v8_dvp L ` rw@ 3@regulator-state-mem LDO_REG2 =vcc3v0_tp L ` rw@ 3@regulator-state-mem LDO_REG3 =vcc1v8_pmupll L ` r 5 &%regulator-state-mem  w@LDO_REG4 =vcc_sdio L ` rw@ 3@/regulator-state-mem  -LDO_REG5 =vcca3v0_codec L ` rw@ 3@regulator-state-mem LDO_REG6 =vcc_1v5 L ` r 5 &%regulator-state-mem  `LDO_REG7 =vcca1v8_codec L ` r 5 &%regulator-state-mem LDO_REG8 =vcc_3v0 L ` rw@ 3@regulator-state-mem  -SWITCH_REG1 =vcc3v3_s3 L `regulator-state-mem SWITCH_REG2 =vcc3v3_s0 L `regulator-state-mem regulator@40silergy,syr827@ default =vdd_cpu_b r 4 `  L ` !Lregulator-state-mem regulator@41silergy,syr828A default =vdd_gpu r 4 `  L ` !Lregulator-state-mem i2c@ff3d0000rockchip,rk3399-i2c=+ G   i2cpclk8default+okayak09911@casahi-kasei,ak09911  , 7mpu6500@68invensense,mpu6500h defaultolsm6ds3@6a st,lsm6ds3j default ,ocm32181@10capella,cm32181 default ,fusb302@22 fcs,fusb302" default Bconnectorusb-c-connector Nhost XUSB-C ^B@ pdual {  sinkports+port@0endpointport@1endpointport@2endpointi2c@ff3e0000rockchip,rk3399-i2c>+ G   i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB default disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  defaultokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 default disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_monvideo-codec@ff650000rockchip,rk3399-vpue rq 1vepuvdpu aclkhclk iommu@ff650800rockchip,iommue@s aclkiface video-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore  iommu@ff660480rockchip,iommu f@f@u aclkiface  iommu@ff670800rockchip,iommug@* aclkiface  disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@    apb_pclkbdma-controller@ff6e0000arm,pl330arm,primecelln@    apb_pclkQclock-controller@ff750000rockchip,rk3399-pmucruuxin24m +G(Jclock-controller@ff760000rockchip,rk3399-cruvxin24m +@BCxDG#g/;рxh<4`#Fׄׄ ׄsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domainokay   / mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf % disabledusb2phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480mokay1host-port % 1linestateokay_2otg-port %0ghj1otg-bvalidotg-idlinestateokay_5portendpointusb2phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480mokay3host-port % 1linestateokay_4otg-port %0lmo1otg-bvalidotg-idlinestateokay7phy@f780rockchip,rk3399-emmc-phy$emmcclk 02 %okay0pcie-phyrockchip,rk3399-pcie-phyrefclk %phy disabledphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref+~GLuphyuphy-pipeuphy-tcphyokaydp-port %9portendpointusb3-port %6portendpointphy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref+G Muphyuphy-pipeuphy-tcphyokaydp-port %:usb3-port %8watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifB|btx mclkhclkUdefault disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'|bbtxrxi2s_clki2s_hclkVbclk_onbclk_off disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(|bbtxrxi2s_clki2s_hclkWdefault disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)|bbtxrxi2s_clki2s_hclkX disabledvop@ff8f0000rockchip,rk3399-vop-lit w+Gׄaclk_vopdclk_vophclk_vop  axiahbdclkokayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4<iommu@ff8f3f00rockchip,iommu?w aclkiface okayvop@ff900000rockchip,rk3399-vop-big v+Gׄaclk_vopdclk_vophclk_vop  axiahbdclkokayport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4;iommu@ff903f00rockchip,iommu?v aclkiface okayisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk y~dphy disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface  Disp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk y~dphy disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface  Dhdmi-soundsimple-audio-card _i2s x hdmi-soundokaysimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi!(tqpoiahbisfrcecgrfrefokay ports+port@0+endpoint@0endpoint@1port@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfapb+ disabledports+port@0+endpoint@0endpoint@1port@1dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfapb+ % disabledports+port@0+endpoint@0endpoint@1port@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultdp disabledports+port@0+endpoint@0endpoint@1port@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 1jobmmugpu#2 P#okay kpinctrlrockchip,rk3399-pinctrl+gpio@ff720000rockchip,gpio-bankr   (gpio@ff730000rockchip,gpio-banks   gpio@ff780000rockchip,gpio-bankxP   Hgpio@ff788000rockchip,gpio-bankxQ   #gpio@ff790000rockchip,gpio-bankyR   pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma   pcfg-pull-none-13ma   pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma   pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low +pcfg-input-enable 6pcfg-input-pull-up 6 pcfg-input-pull-down 6 clockclk-32k Ccifcif-clkin C cif-clkouta C edpedp-hpd Cgmacrgmii-pins C     rmii-pins C     phy-intb C !phy-rstb C"i2c0i2c0-xfer Ci2c1i2c1-xfer C>i2c2i2c2-xfer C?i2c3i2c3-xfer C@i2c4i2c4-xfer C  i2c5i2c5-xfer C  Ai2c6i2c6-xfer C  Bi2c7i2c7-xfer CCi2c8i2c8-xfer Ci2s0i2s0-2ch-bus` Ci2s0-2ch-bus-bclk-off` Ci2s0-8ch-bus Ci2s0-8ch-bus-bclk-off Ci2s1i2s1-2ch-busP Ci2s1-2ch-bus-bclk-offP Csdio0sdio0-bus1 Csdio0-bus4@ C%sdio0-cmd C&sdio0-clk C'sdio0-cd Csdio0-pwr Csdio0-bkpwr Csdio0-wp Csdio0-int Csdmmcsdmmc-bus1 Csdmmc-bus4@ C   -sdmmc-clk C *sdmmc-cmd C +sdmmc-cd C,sdmmc-wp Csuspendap-pwroff Cddrio-pwroff Cspdifspdif-bus Cspdif-bus-1 Cspi0spi0-clk CRspi0-cs0 CUspi0-cs1 Cspi0-tx CSspi0-rx CTspi1spi1-clk C Vspi1-cs0 C Yspi1-rx CXspi1-tx CWspi2spi2-clk C Zspi2-cs0 C ]spi2-rx C \spi2-tx C [spi3spi3-clk Cspi3-cs0 Cspi3-rx Cspi3-tx Cspi4spi4-clk C^spi4-cs0 Caspi4-rx C`spi4-tx C_spi5spi5-clk Ccspi5-cs0 Cfspi5-rx Cespi5-tx Cdtestclktest-clkout0 Ctest-clkout1 Ctest-clkout2 Ctsadcotp-pin Clotp-out Cmuart0uart0-xfer CDuart0-cts CEuart0-rts CFuart1uart1-xfer C  Nuart2auart2a-xfer C uart2buart2b-xfer Cuart2cuart2c-xfer COuart3uart3-xfer CPuart3-cts Cuart3-rts Cuart4uart4-xfer Cuarthdcpuarthdcp-xfer Cpwm0pwm0-pin Cpwm0-pin-pull-down Cvop0-pwm-pin Cvop1-pwm-pin Cpwm1pwm1-pin Cpwm1-pin-pull-down Cpwm2pwm2-pin Cpwm2-pin-pull-down Cpwm3apwm3a-pin Cpwm3bpwm3b-pin Chdmihdmi-i2c-xfer Chdmi-cec Cpciepci-clkreqn-cpm Cpci-clkreqnb-cpm Cbuttonspwr-btn Cpmiccpu-b-sleep Cgpu-sleep Cpmic-int-l Csdsdmmc0-pwr-h Cusb2vcc5v0-host-en Cvcc5v0-typec-en Csdio-pwrseqwifi-reg-on-h C wifiwifi-host-wake-l C)bluetoothbt-enable-h C Kbt-host-wake-l CIbt-wake-l CJmpu6500gsensor-int-l Clsm6ds3gyr-int-l Ccm32181light-int-l Cfusb302chg-cc-int-l Copp-table-0operating-points-v2 Q opp00 \Q c  q@opp01 \#F c opp02 \0, c P Popp03 \< cHHopp04 \G cB@B@opp05 \Tfr c**opp-table-1operating-points-v2 Qopp00 \Q c  q@opp01 \#F c opp02 \0, c opp03 \< c Y Yopp04 \G c~~opp05 \Tfr copp06 \_" copp07 \kI cOOopp-table-2operating-points-v2opp00 \  c 0opp01 \@ c 0opp02 \ׄ c 0opp03 \e c Y Y0opp04 \#F cHH0opp05 \/ c0chosen serial2:1500000n8external-gmac-clock fixed-clocksY@ clkin_gmacadc-keys adc-keys  buttons w@ dbutton-up XVolume Up s button-down XVolume Down r button-back XBack  button-menu XMenu   dc-12vregulator-fixed =dc_12v L ` r gpio-keys gpio-keys key-power d ( XGPIO Power t defaultsdio-pwrseqmmc-pwrseq-simpleG ext_clockdefault ( $vcc1v8-s3regulator-fixed =vcc1v8_s3 L ` rw@ w@ !M=vcc3v0-sdregulator-fixed & 9(default ` - r- =vcc3v0_sd !L.vcc3v3-sysregulator-fixed =vcc3v3_sys L ` r2Z 2Z !Lvcc5v0-host-regulatorregulator-fixed & 9default =vcc5v0_host L !vbus-typec-regulatorregulator-fixed & 9default =vbus_typec !vcc-sysregulator-fixed =vcc_sys L ` rLK@ LK@ !vdd-logpwm-regulator >a C =vdd_log L ` r 5 \ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modephy-handletx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyvdd-supplyvid-supplyvbus-supplydata-rolelabelop-sink-microwattpower-rolesink-pdossource-pdostry-power-role#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltautorepeatdebounce-intervallinux,input-typeenable-active-highgpiopwmspwm-supply