_8( g *,sinovoip,rk3568-bpi-r2prorockchip,rk3568$7Bananapi-R2 Pro (RK3568) DDR4 Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55 !psci/CP@bo|@ cpu@100cpu,arm,cortex-a55!psci/CP@bo|@ cpu@200cpu,arm,cortex-a55!psci/CP@bo|@ cpu@300cpu,arm,cortex-a55!psci/CP@bo|@ l3-cache,cacheER@dopp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystem firmwarescmi ,arm,scmi-smc protocol@14"opp-table-1,operating-points-v2Copp-200000000  opp-300000000 opp-400000000ׄ opp-600000000#F opp-700000000)' opp-800000000/B@hdmi-sound,simple-audio-card/HDMIFi2s_yokaysimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0(smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m"xin32k ,fixed-clockxin32k default"sram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@ satapmaliverxoob _  sata-phy. ydisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob `  sata-phy.yokayusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@  ref_clksuspend_clkbus_clk?@ABgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' 8jobmmugpu gpubus/C.yokayHDvideo-codec@fdea0400,rockchip,rk3568-vpu 8vdpu  aclkhclkTE. iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface . [Erga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Z aclkhclksclkM&$% hcoreaxiahb. video-codec@fdee0000,rockchip,rk3568-vepu @  aclkhclkTF. iommu@fdee0800,rockchip,rk3568-iommu@ ?  aclkiface. [Fmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d  biuciuciu-driveciu-sampletрMhreset ydisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a 8macirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refM hstmmacethpGHIyokay4YoutputJrgmiidefaultKLMNO P $N 9<B/mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22Jstmmac-axi-configKUeGrx-queues-configuHqueue0tx-queues-configIqueue0vop@fe040000 0@vopgamma-lut ( %aclkhclkdclk_vp0dclk_vp1dclk_vp2TQ. pyokay,rockchip,rk3568-vop4Yports port@0 endpoint@2RZport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?   aclkiface[. yokayQdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi Dpclk dphy S. hapbMp ydisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi Epclk dphy T. hapbMp ydisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -( (iahbisfrcecrefdefault UVW. pyokayXYports port@0endpointZRport@1endpoint[qos@fe128000,rockchip,rk3568-qossyscon )qos@fe138080,rockchip,rk3568-qossyscon 8qos@fe138100,rockchip,rk3568-qossyscon 9qos@fe138180,rockchip,rk3568-qossyscon :qos@fe148000,rockchip,rk3568-qossyscon *qos@fe148080,rockchip,rk3568-qossyscon +qos@fe148100,rockchip,rk3568-qossyscon ,qos@fe150000,rockchip,rk3568-qossyscon 6qos@fe158000,rockchip,rk3568-qossyscon 0qos@fe158100,rockchip,rk3568-qossyscon 1qos@fe158180,rockchip,rk3568-qossyscon 2qos@fe158200,rockchip,rk3568-qossyscon 3qos@fe158280,rockchip,rk3568-qossyscon 4qos@fe158300,rockchip,rk3568-qossyscon 5qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon ;qos@fe190280,rockchip,rk3568-qossyscon ?qos@fe190300,rockchip,rk3568-qossyscon @qos@fe190380,rockchip,rk3568-qossyscon Aqos@fe190400,rockchip,rk3568-qossyscon Bqos@fe198000,rockchip,rk3568-qossyscon 7qos@fe1a8000,rockchip,rk3568-qossyscon -qos@fe1a8080,rockchip,rk3568-qossyscon .qos@fe1a8100,rockchip,rk3568-qossyscon /dfi@fe230000,rockchip,rk3568-dfi#  \pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHG8syspmcmsglegacyerr( $aclk_mstaclk_slvaclk_dbipclkauxpci`]]]]$5DSbj  pcie-phy.T @@Mhpipe  ydisabledlegacy-interrupt-controllerm H]mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b  biuciuciu-driveciu-sampletрMhresetyokayt~  default^_`abmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c  biuciuciu-driveciu-sampletрMhreset ydisabledspi@fe300000 ,rockchip,sfc0@ e xvclk_sfchclk_sfccdefault ydisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 4{}D n6( |zy{}corebusaxiblocktimeryokayt defaultdefgi2s@fe400000,rockchip,rk3568-i2s-tdm@ 44=ADFqFq ?C9mclk_txmclk_rxhclkhtxMPQ htx-mrx-mpyokayi2s@fe410000,rockchip,rk3568-i2s-tdmA 54EIDFqFq GK:mclk_txmclk_rxhclkhhrxtxMRS htx-mrx-mpdefault0ijklmnopqrst ydisabledi2s@fe420000,rockchip,rk3568-i2s-tdmB 64MDFq OO;mclk_txmclk_rxhclkhhtxrxMThtx-mpdefaultuvwx ydisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7 SW<mclk_txmclk_rxhclkhhtxrxMUV htx-mrx-mp ydisabledpdm@fe440000,rockchip,rk3568-pdmD L ZYpdm_clkpdm_hclkh rxyz{|}~defaultMXhpdm-m ydisabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk _\htxdefault ydisableddma-controller@fe530000,arm,pl330arm,primecellS@    apb_pclk#dma-controller@fe550000,arm,pl330arm,primecellU@   apb_pclkhi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ / HG i2cpclkdefault  ydisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0 JI i2cpclkdefault  ydisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1 LK i2cpclkdefault yokayrtc@51,haoyu,hym8563Q " rtcic_32koutdefault i2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2 NM i2cpclkdefault  ydisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3 PO i2cpclkdefault  ydisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`   tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia g RQspiclkapb_pclk##txrxdefault   ydisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib h TSspiclkapb_pclk##txrxdefault   ydisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic i VUspiclkapb_pclk##txrxdefault   ydisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid j XWspiclkapb_pclk##txrxdefault  ydisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte u baudclkapb_pclk##default ydisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v # baudclkapb_pclk##defaultyokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w '$baudclkapb_pclk##default ydisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x +(baudclkapb_pclk## default ydisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y /,baudclkapb_pclk# # default ydisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z 30baudclkapb_pclk# # default ydisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk { 74baudclkapb_pclk##default ydisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl | ;8baudclkapb_pclk##default ydisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm } ?<baudclkapb_pclk##default ydisabledthermal-zonescpu-thermal d  (tripscpu_alert0 8p Dpassivecpu_alert1 8$ Dpassivecpu_crit 8s D criticalcooling-mapsmap0 O0 T gpu-thermal   (tripsgpu-threshold 8p Dpassivegpu-target 8$ Dpassivegpu-crit 8s D criticalcooling-mapsmap0 O Ttsadc@fe710000,rockchip,rk3568-tsadcq s4Df@ ` tsadcapb_pclkMp csinitdefaultsleep z  yokay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ] saradcapb_pclkM hsaradc-apb yokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault ydisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault ydisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  ZY pwmpclkdefault ydisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 ZY pwmpclkdefault ydisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultyokaypwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault ydisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ]\ pwmpclkdefault ydisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ]\ pwmpclkdefault ydisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault ydisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault ydisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  `_ pwmpclkdefault ydisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 `_ pwmpclkdefault ydisabledphy@fe830000,rockchip,rk3568-naneng-combphy "} refapbpipe4"DM   yokayphy@fe840000,rockchip,rk3568-naneng-combphy %~ refapbpipe4%DM   yokayphy@fe870000,rockchip,rk3568-csi-dphy ypclk Mhapbp ydisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclk z . hapbM ydisabledSmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk { . hapbM ydisabledTusb2phy@fe8a0000,rockchip,rk3568-usb2phy phyclkclk_usbphy0_480m  '"yokayhost-port yokay 7otg-port yokay 7usb2phy@fe8b0000,rockchip,rk3568-usb2phy phyclkclk_usbphy1_480m  '"yokayhost-port yokayotg-port yokaypinctrl,rockchip,rk3568-pinctrlp\ gpio@fdd60000,rockchip,gpio-bank ! .  B R  ^m gpio@fe740000,rockchip,gpio-bankt " cd B R  ^mgpio@fe750000,rockchip,gpio-banku # ef B R@  ^mgpio@fe760000,rockchip,gpio-bankv $ gh B R`  ^mPgpio@fe770000,rockchip,gpio-bankw % ij B R  ^mpcfg-pull-up jpcfg-pull-none wpcfg-pull-none-drv-level-1 w pcfg-pull-none-drv-level-2 w pcfg-pull-none-drv-level-3 w pcfg-pull-none-drv-level-5 w pcfg-pull-up-drv-level-1 j pcfg-pull-up-drv-level-2 j pcfg-pull-none-smt w acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0  cpuebcedpdpemmcemmc-bus8   demmc-clk eemmc-cmd femmc-datastrobe geth0eth1flashfspifspi-pins` cgmac0gmac0-miim gmac0-rx-bus20 gmac0-tx-bus20    gmac0-rgmii-clk gmac0-rgmii-bus@ gmac1gmac1m1-miim Kgmac1m1-rx-bus20  Mgmac1m1-tx-bus20 Lgmac1m1-rgmii-clk Ngmac1m1-rgmii-bus@ Ogpuhdmitxhdmitxm0-cec Whdmitx-scl Uhdmitx-sda Vi2c0i2c0-xfer  i2c1i2c1-xfer  i2c2i2c2m0-xfer i2c3i2c3m0-xfer i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2s1i2s1m0-lrckrx li2s1m0-lrcktx ki2s1m0-sclkrx ji2s1m0-sclktx ii2s1m0-sdi0  mi2s1m0-sdi1  ni2s1m0-sdi2  oi2s1m0-sdi3 pi2s1m0-sdo0 qi2s1m0-sdo1 ri2s1m0-sdo2  si2s1m0-sdo3  ti2s2i2s2m0-lrcktx vi2s2m0-sclktx ui2s2m0-sdi wi2s2m0-sdo xi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk ypdmm0-clk1 zpdmm0-sdi0  {pdmm0-sdi1  |pdmm0-sdi2  }pdmm0-sdi3 ~pmicpmic_int !pmupwm0pwm0m0-pins %pwm1pwm1m0-pins &pwm2pwm2m0-pins 'pwm3pwm3-pins (pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m1-pins pwm13pwm13m1-pins pwm14pwm14m1-pins pwm15pwm15m1-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ ^sdmmc0-clk _sdmmc0-cmd `sdmmc0-det asdmmc1sdmmc2spdifspdifm0-tx spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m1-pins0 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer $uart1uart1m0-xfer   uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m1-xfer uart8uart8m0-xfer uart9uart9m1-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2ledsblue-led-pin green-led-pin hym8563hym8563-int ir-receiverir-receiver-pin pcieminipcie-enable-h ngffpcie-enable-h minipcie-reset-h ngffpcie-reset-h usbvcc5v0_usb_host_en vcc5v0_usb_otg_en sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob ^  sata-phy. ydisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon <qos@fe190100,rockchip,rk3568-qossyscon =qos@fe190200,rockchip,rk3568-qossyscon >syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy  &'wrefclk_mrefclk_npclkMhphy yokay  7pcie@fe270000,rockchip,rk3568-pcie ( $aclk_mstaclk_slvaclk_dbipclkauxpci<8syspmcmsglegacyerr`$5DSbj  pcie-phy.0@@'T @@@dbiapbconfigMhpipeyokaydefault P legacy-interrupt-controllerm pcie@fe280000,rockchip,rk3568-pcie ( $aclk_mstaclk_slvaclk_dbipclkauxpci<8syspmcmsglegacyerr`$5DSb j  pcie-phy.0@(T @@dbiapbconfigMhpipeyokaydefault  legacy-interrupt-controllerm ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*8macirqeth_wake_irq@ Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refM hstmmacethpyokay4Yinputrgmiidefault P $N 9OBmdio,snps,dwmac-mdio switch@1f,mediatek,mt7531ports port@1 lan0port@2 lan1port@3 lan2port@4 lan3port@5 cpu rgmiifixed-link\  stmmac-axi-configKUerx-queues-configuqueue0tx-queues-configqueue0fixed-link\  phy@fe820000,rockchip,rk3568-naneng-combphy | refapbpipe4DM   yokaychosen serial2:1500000n8leds ,gpio-ledsdefaultled-0  !off /status  led-1  !on /power  dc-12v-regulator,regulator-fixeddc_12v';d|hdmi-con,hdmi-connectoraportendpoint[ir-receiver,gpio-ir-receiver  defaultvcc3v3-sys-regulator,regulator-fixed vcc3v3_sys';d2Z|2Z 8"vcc5v0-sys-regulator,regulator-fixed vcc5v0_sys';dLK@|LK@ 8pcie30-avdd0v9-regulator,regulator-fixedpcie30_avdd0v9';d |  8"pcie30-avdd1v8-regulator,regulator-fixedpcie30_avdd1v8';dw@|w@ 8"vcc3v3-pi6c-05-regulator,regulator-fixed vcc3v3_pcied2Z|2Z C   V @ 8vcc3v3-minipcie-regulator,regulator-fixedvcc3v3_minipcied2Z|2Z C  default VP 8vcc3v3-ngff-regulator,regulator-fixed vcc3v3_ngffd2Z|2Z C  default VP 8vcc5v0-usb-regulator,regulator-fixed vcc5v0_usb';dLK@|LK@ 8vcc5v0-usb-host-regulator,regulator-fixed C  defaultvcc5v0_usb_hostdLK@|LK@ 8vcc5v0-usb-otg-regulator,regulator-fixed C  defaultvcc5v0_usb_otgdLK@|LK@ 8 interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachephandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grfrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-nameregulator-always-onregulator-boot-onregulator-initial-moderegulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaysnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfdata-lanesreset-gpiosvpcie3v3-supplylabelethernetfull-duplexpausestdout-pathcolordefault-statefunctionvin-supplyenable-active-highstartup-delay-us