98+ ( *9tsd,rk3588-tiger-haikoutsd,rk3588-tigerrockchip,rk3588 +17Theobroma Systems RK3588-Q7 SoM on Haikou devkitaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/i2c@fec80000/rtc@6f/ethernet@fe1b0000/mmc@fe2c0000cpus+cpu-mapcluster0core0 core1 core2 core3 cluster1core0 core1 cluster2core0 core1 cpu@0cpuarm,cortex-a55psci,? F V0,k {@@  cpu@100cpuarm,cortex-a55psci,? k {@@ cpu@200cpuarm,cortex-a55psci,? k {@@ cpu@300cpuarm,cortex-a55psci,? k {@@ cpu@400cpuarm,cortex-a76psci,? F V0,k {@@ cpu@500cpuarm,cortex-a76psci,? k {@@ cpu@600cpuarm,cortex-a76psci,? F V0,k {@@ cpu@700cpuarm,cortex-a76psci,? k {@@  idle-states pscicpu-sleeparm,idle-state->Udfxv l2-cache-l0cache}@ l2-cache-l1cache}@l2-cache-l2cache}@l2-cache-l3cache}@l2-cache-b0cache}@l2-cache-b1cache}@l2-cache-b2cache}@l2-cache-b3cache}@l3-cachecache}0@display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tz%smcscmi arm,scmi-smc+protocol@14 protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0%smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmemgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf F V ?corecoregroupstacks 0\]^ jobmmugpu#7 EokayLopp-tableoperating-points-v2opp-300000000X _ L L Popp-400000000Xׄ _ L L Popp-500000000Xe _ L L Popp-600000000X#F _ L L Popp-700000000X)' _ ` ` Popp-800000000X/ _ q q Popp-900000000X5 _ 5 5 Popp-1000000000X; _ P P Pusb@fc000000rockchip,rk3588-dwc3snps,dwc3@?ref_clksuspend_clkbus_clkmotg u !zusb2-phyusb3-phy utmi_wide7REokay@"usb@fc800000"rockchip,rk3588-ehcigeneric-ehci?#u$zusb7Eokayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci?#u$zusb7Eokayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci?%u&zusb7Eokayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci?%u&zusb7Eokayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(?jihkr&ref_clksuspend_clkbus_clkutmipipemhostu' zusb3-phy utmi_wide4GEokayiommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-synca Edisablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-synca Edisabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdXfsyscon@fd58c000rockchip,rk3588-sys-grfsysconXasyscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ bsyscon@fd5a6000rockchip,rk3588-vo-grfsysconZ` ?syscon@fd5a8000rockchip,rk3588-vo-grfsysconZ?csyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@syscon@fd5b0000rockchip,rk3588-php-grfsyscon[)syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@0rockchip,rk3588-usb2phy?phyclk usb480m_phy0mnphyapbEokayotg-portzEokay( syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy?phyclk usb480m_phy2onphyapbEokay#host-portzEokay$syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy?phyclk usb480m_phy3p nphyapbEokay%host-portzEokay&syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^syscon@fd5f0000rockchip,rk3588-iocsyscon_sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|F]q@VA.2Fq)׫ׄe/ׄ eZ р )i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=?ts i2cpclk*default+ Edisabledserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK?baudclkapb_pclk++txrx,default Edisabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm? pwmpclk-default Edisabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm? pwmpclk.default Edisabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ? pwmpclk/default Edisabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0? pwmpclk0default Edisabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfddpower-controller!rockchip,rk3588-power-controller+Eokaypower-domain@8+power-domain@9  ?!#" 123+power-domain@10 ?!#"4power-domain@11 ?!#"5power-domain@12 ?6789power-domain@13 +power-domain@14(?:power-domain@15 ?;power-domain@16? <=>+power-domain@17 ? ?@Apower-domain@21? BCDEFGHI+power-domain@23?CAJpower-domain@14 ?:power-domain@15?;power-domain@22?Kpower-domain@24?[Z]LM+power-domain@258?ZNpower-domain@268?QOPpower-domain@270?QRST+power-domain@28 ?UVpower-domain@29(?WXpower-domain@30?z{Ypower-domain@31@?WZ[\]power-domain@33!?WZ[power-domain@34"?WZ[power-domain@37%?2^power-domain@38&?45power-domain@40(_video-codec@fdc70000rockchip,rk3588-av1-vpulvdpuFACVׄׄ?AC aclkhclk7 vop@fdd90000rockchip,rk3588-vop BPvopgamma-lut8?]\abcd[7aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vop `7ab#c4d Edisabledports+port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~?]\ aclkifacea7 Edisabled`i2s@fddc0000rockchip,rk3588-i2s-tdm?mclk_txmclk_rxhclkFAetx7ntx-mX Edisabledi2s@fddf0000rockchip,rk3588-i2s-tdm?445mclk_txmclk_rxhclkF1Aetx7ntx-mX Edisabledi2s@fddfc000rockchip,rk3588-i2s-tdm?00,mclk_txmclk_rxhclkF-Aerx7nrx-mX Edisabledqos@fdf35000rockchip,rk3588-qossysconP 6qos@fdf35200rockchip,rk3588-qossysconR 7qos@fdf35400rockchip,rk3588-qossysconT 8qos@fdf35600rockchip,rk3588-qossysconV 9qos@fdf36000rockchip,rk3588-qossyscon` Yqos@fdf39000rockchip,rk3588-qossyscon ^qos@fdf3d800rockchip,rk3588-qossyscon _qos@fdf3e000rockchip,rk3588-qossyscon [qos@fdf3e200rockchip,rk3588-qossyscon Zqos@fdf3e400rockchip,rk3588-qossyscon \qos@fdf3e600rockchip,rk3588-qossyscon ]qos@fdf40000rockchip,rk3588-qossyscon Wqos@fdf40200rockchip,rk3588-qossyscon Xqos@fdf40400rockchip,rk3588-qossyscon Qqos@fdf40500rockchip,rk3588-qossyscon Rqos@fdf40600rockchip,rk3588-qossyscon Sqos@fdf40800rockchip,rk3588-qossyscon Tqos@fdf41000rockchip,rk3588-qossyscon Uqos@fdf41100rockchip,rk3588-qossyscon Vqos@fdf60000rockchip,rk3588-qossyscon <qos@fdf60200rockchip,rk3588-qossyscon =qos@fdf60400rockchip,rk3588-qossyscon >qos@fdf61000rockchip,rk3588-qossyscon ?qos@fdf61200rockchip,rk3588-qossyscon @qos@fdf61400rockchip,rk3588-qossyscon Aqos@fdf62000rockchip,rk3588-qossyscon :qos@fdf63000rockchip,rk3588-qossyscon0 ;qos@fdf64000rockchip,rk3588-qossyscon@ Jqos@fdf66000rockchip,rk3588-qossyscon` Bqos@fdf66200rockchip,rk3588-qossysconb Cqos@fdf66400rockchip,rk3588-qossyscond Dqos@fdf66600rockchip,rk3588-qossysconf Eqos@fdf66800rockchip,rk3588-qossysconh Fqos@fdf66a00rockchip,rk3588-qossysconj Gqos@fdf66c00rockchip,rk3588-qossysconl Hqos@fdf66e00rockchip,rk3588-qossysconn Iqos@fdf67000rockchip,rk3588-qossysconp Kqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon 4qos@fdf71000rockchip,rk3588-qossyscon 5qos@fdf72000rockchip,rk3588-qossyscon 1qos@fdf72200rockchip,rk3588-qossyscon" 2qos@fdf72400rockchip,rk3588-qossyscon$ 3qos@fdf80000rockchip,rk3588-qossyscon Nqos@fdf81000rockchip,rk3588-qossyscon Oqos@fdf81200rockchip,rk3588-qossyscon Pqos@fdf82000rockchip,rk3588-qossyscon Lqos@fdf82200rockchip,rk3588-qossyscon" Mdfi@fe060000rockchip,rk3588-dfi@&0:4fpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pciei0?0?CH>MR)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerrs`gggg0h0u' zpcie-phy7"T @ @0 @@dbiapbconfig). npwrpipe+ Edisabledlegacy-interrupt-controllers gpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pciei@O0?DI?NSs)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerrs`iiii@h@uj zpcie-phy7"T @ @0 A@dbiapbconfig*/ npwrpipe+ Edisabledlegacy-interrupt-controllers iethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(?67Y^50stmmacethclk_mac_refpclk_macaclk_macptp_ref7!$ nstmmacetha)k l1mD Edisabledmdiosnps,dwmac-mdio+stmmac-axi-configMWgkrx-queues-configwlqueue0queue1tx-queues-configmqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(?b_eTosatapmaliverxoobrefasic+ Edisabledsata-port@0@uj zsata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(?dagVqsatapmaliverxoobrefasic+ Edisabledsata-port@0@u' zsata-phy  spi@fe2b0000 rockchip,sfc+@?/0clk_sfchclk_sfc+ Edisabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ ?  biuciuciu-driveciu-sampleрdefault nop7(Eokayq !r*5BO\jsmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ ?biuciuciu-driveciu-sample defaultt7% Edisabledmmc@fe2e0000rockchip,rk3588-dwcmshc.F-., V n6 (?,*+-.corebusaxiblocktimer uvwxdefault(ncorebusaxiblocktimerEokayvyjz{i2s@fe470000rockchip,rk3588-i2s-tdmG?+/(mclk_txmclk_rxhclkF)-A++txrx7&*+ ntx-mrx-mdefault(|}~X Edisabledi2s@fe480000rockchip,rk3588-i2s-tdmH?y}umclk_txmclk_rxhclk++txrx^_ ntx-mrx-mdefault(X Edisabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI?i2s_clki2s_hclkFAtxrx7&defaultX Edisabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ?%i2s_clki2s_hclkF"Atxrx7&defaultXEokay interrupt-controller@fe600000 arm,gic-v3 `h a&81s+msi-controller@fe640000arm,gic-v3-itsd1@hmsi-controller@fe660000arm,gic-v3-itsf1@ppi-partitionsinterrupt-partition-0Kinterrupt-partition-1K dma-controller@fea10000arm,pl330arm,primecell@ VWT?n apb_pclkk+dma-controller@fea30000arm,pl330arm,primecell@ XYT?o apb_pclkki2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c?{ i2cpclk>default+Eokayeeprom@50P atmel,24c01vsi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c?| i2cpclk?default+Eokayi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c?} i2cpclk@default+ Edisabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c?~ i2cpclkAdefault+Eokayregulator@42rockchip,rk8602B vdd_npu_s0dp~  !regulator-state-mem ,i2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c? i2cpclkBdefault+Eokaycodec@a fsl,sgtl5000 ?X E Qs ^timer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !?TW pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt?dc tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF?spiclkapb_pclk++txrx j default+ Edisabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG?spiclkapb_pclk++txrx j default+ Edisabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH?spiclkapb_pclktxrx jdefault+EokayFV pmic@0rockchip,rk806 r q default B@           # 0 = J W ddvs1-null-pins pgpio_pwrctrl1 upin_fun0dvs2-null-pins pgpio_pwrctrl2 upin_fun0dvs3-null-pins pgpio_pwrctrl3 upin_fun0regulatorsdcdc-reg1dp~ 0 vdd_gpu_s0 ~regulator-state-mem ,dcdc-reg2vdd_cpu_lit_s0dp~ 0 regulator-state-mem ,dcdc-reg3 vdd_log_s0 L q 0regulator-state-mem , qdcdc-reg4 vdd_vdenc_s0dp~ 0regulator-state-mem ,dcdc-reg5 vdd_ddr_s0 L  0regulator-state-mem , Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg7vcc_2v0_pldo_s3 0regulator-state-mem  dcdc-reg8 vcc_3v3_s32Z2Zzregulator-state-mem  2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem ,dcdc-reg10 vcc_1v8_s3w@w@{regulator-state-mem  w@pldo-reg1 vcca_1v8_s0w@w@regulator-state-mem ,pldo-reg2 vcc_1v8_s0w@w@regulator-state-mem , w@pldo-reg3 vdda_1v2_s0OOregulator-state-mem ,pldo-reg4 vcca_3v3_s02Z2Z 0regulator-state-mem ,pldo-reg5 vccio_sd_s0w@2Z 0qregulator-state-mem ,pldo-reg6 pldo6_s3w@w@regulator-state-mem  w@nldo-reg1 vdd_0v75_s3 q qregulator-state-mem  qnldo-reg2vdda_ddr_pll_s0 P Pregulator-state-mem , Pnldo-reg3 vdda_0v75_s0 q qregulator-state-mem ,nldo-reg4 vdda_0v85_s0 P Pregulator-state-mem ,nldo-reg5 vdd_0v75_s0 q qregulator-state-mem ,spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI?spiclkapb_pclktxrx j default+ Edisabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL?baudclkapb_pclk++ txrxdefault Edisabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM?baudclkapb_pclk+ + txrxdefaultEokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN?baudclkapb_pclk+ + txrxdefault Edisabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO?baudclkapb_pclk txrxdefaultEokayserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP?baudclkapb_pclk txrxdefault Edisabled serial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ?baudclkapb_pclk txrxdefault Edisabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR?baudclkapb_pclkeetxrxdefault Edisabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS?baudclkapb_pclke e txrxdefault Edisabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT?baudclkapb_pclke e txrxdefault Edisabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm?LK pwmpclkdefault Edisabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm?LK pwmpclkdefault Edisabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ?LK pwmpclkdefault Edisabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0?LK pwmpclkdefault Edisabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm?ON pwmpclkdefault Edisabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm?ON pwmpclkdefault Edisabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ?ON pwmpclkdefault Edisabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0?ON pwmpclkdefault Edisabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm?RQ pwmpclkdefault Edisabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm?RQ pwmpclkdefault Edisabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ?RQ pwmpclkdefault Edisabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0?RQ pwmpclkdefault Edisabledtsadc@fec00000rockchip,rk3588-tsadc?tsadcapb_pclkFVVWntsadc-apbtsadc    ! gpiootpout +Eokayadc@fec10000rockchip,rk3588-saradc A?saradcapb_pclkU nsaradc-apbEokay Si2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c? i2cpclkCdefault+Eokayfan@18 ti,amc6821rtc@6f isil,isl1208oi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c? i2cpclkDdefault+Eokayregulator@42rockchip,rk8602Bvdd_cpu_big0_s0dp  !regulator-state-mem ,regulator@43 rockchip,rk8603rockchip,rk8602Cvdd_cpu_big1_s0dp  !regulator-state-mem ,i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c? i2cpclkEdefault+Eokayspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ?spiclkapb_pclke etxrx j default+ Edisabledefuse@fecc0000rockchip,rk3588-otp ?otpapb_pclkphyarb notpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c _npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[T?p apb_pclkkephy@fed60000rockchip,rk3588-hdptx-phy ?Trefapbz8#cde!""nphyapbinitcmnlaneroplllcpll Edisabledphy@fed80000rockchip,rk3588-usbdp-phyz?lVrefclkimmortalpclkutmi(   ninitcmnlanepcs_apbpma_apb d w  Eokay!phy@fee00000rockchip,rk3588-naneng-combphy?vW refapbpipeFVz<Cnphyapb )  Edisabledjphy@fee20000rockchip,rk3588-naneng-combphy?xW refapbpipeFVz>Enphyapb ) Eokay'sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrl+gpio@fd8a0000rockchip,gpio-bank?qr q  srgpio@fec20000rockchip,gpio-bank?st q  sgpio@fec30000rockchip,gpio-bank?uv q @  sgpio@fec40000rockchip,gpio-bank?wx q `  sgpio@fec50000rockchip,gpio-bank?yz q  spcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-0  pcfg-pull-none-drv-level-2  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-bus8 /uemmc-clk /wemmc-cmd /vemmc-data-strobe /xemmc-reset /eth1fspigmac1gpuhdmii2c0i2c0m0-xfer / *i2c1i2c1m0-xfer /  i2c2i2c2m3-xfer /  i2c3i2c3m0-xfer /  i2c4i2c4m4-xfer /  i2c5i2c5m1-xfer /  i2c6i2c6m0-xfer /  i2c7i2c7m0-xfer /  i2c8i2c8m2-xfer /  i2s0i2s0-lrck /|i2s0-sclk /}i2s0-sdi0 /~i2s0-sdi1 /i2s0-sdi2 /i2s0-sdi3 /i2s0-sdo0 /i2s0-sdo1 /i2s0-sdo2 /i2s0-sdo3 /i2s1i2s1m0-lrck /i2s1m0-sclk /i2s1m0-sdi0 /i2s1m0-sdi1 /i2s1m0-sdi2 /i2s1m0-sdi3 /i2s1m0-sdo0 / i2s1m0-sdo1 / i2s1m0-sdo2 / i2s1m0-sdo3 / i2s2i2s2m1-lrck /i2s2m1-sclk / i2s2m1-sdi / i2s2m1-sdo / i2s3i2s3-lrck /i2s3-sclk /i2s3-sdi /i2s3-sdo /jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp /pmupwm0pwm0m1-pins / -pwm1pwm1m0-pins /.pwm2pwm2m0-pins //pwm3pwm3m0-pins /0pwm4pwm4m0-pins / pwm5pwm5m0-pins / pwm6pwm6m0-pins / pwm7pwm7m0-pins / pwm8pwm8m0-pins / pwm9pwm9m0-pins / pwm10pwm10m0-pins / pwm11pwm11m0-pins / pwm12pwm12m0-pins / pwm13pwm13m0-pins / pwm14pwm14m0-pins / pwm15pwm15m0-pins / refclksatasata0sata1sata2sdiosdiom1-pins` /tsdmmcsdmmc-bus4@ /nsdmmc-clk /psdmmc-cmd /ospdif0spdif1spi0spi0m1-cs0 / spi0m1-cs1 / spi0m3-pins0 /spi1spi1m1-pins0 /spi1m1-cs0 /spi1m1-cs1 /spi2spi2m2-pins0 / spi2m2-cs0 / spi3spi3m1-pins0 / spi3m1-cs0 /spi3m1-cs1 /spi4spi4m0-pins0 /spi4m0-cs0 /spi4m0-cs1 /tsadctsadc-shut /uart0uart0m1-xfer / ,uart1uart1m1-xfer /  uart2uart2m2-xfer /  uart3uart3m1-xfer /  uart4uart4m2-xfer /  uart5uart5m1-xfer /  uart6uart6m1-xfer /  uart7uart7m1-xfer /  uart8uart8m1-xfer /  uart9uart9m1-xfer /  vopbt656gpio-functsadc-gpio-func /eth0eth0-pins /gmac0gmac0-miim /gmac0-rx-bus20 /gmac0-tx-bus20 /gmac0-rgmii-clk / gmac0-rgmii-bus@ /  etherneteth-reset /ledsmodule-led-pin /usb3usb3-id /haikouhaikou-keys-pin@ /  usb2otg-vbus-drv /  usb@fc400000rockchip,rk3588-dwc3snps,dwc3@@?ref_clksuspend_clkbus_clkmhost uzusb2-phyusb3-phy utmi_wide7SEokaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon[syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon\@syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@@+usb2phy@4000rockchip,rk3588-usb2phy@?phyclk usb480m_phy1nnphyapbEokayotg-portzEokayi2s@fddc8000rockchip,rk3588-i2s-tdm܀?mclk_txmclk_rxhclkFAetx7ntx-mX Edisabledi2s@fddf4000rockchip,rk3588-i2s-tdm@?99?mclk_txmclk_rxhclkF6Aetx7ntx-mX Edisabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀?++'mclk_txmclk_rxhclkF(Aerx7nrx-mX Edisabledi2s@fde00000rockchip,rk3588-i2s-tdm?&&"mclk_txmclk_rxhclkF#Aerx7nrx-mX Edisabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+i4?@E;JOt-aclk_mstaclk_slvaclk_dbipclkauxpiperefpciPsyspmcmsglegacyerrs`u zpcie-phy7"T @ @0 @@dbiapbconfig&+ npwrpipeEokay = Islegacy-interrupt-controllers pcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+i0?AF<KPu)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerrs`u zpcie-phy7"T @ @@0 @@@dbiapbconfig', npwrpipe Edisabledlegacy-interrupt-controllers pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pciei /0?BG=LQ)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerrs` h u zpcie-phy7"T @ @0 @@dbiapbconfig(- npwrpipe+ Edisabledlegacy-interrupt-controllers ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(?67X]40stmmacethclk_mac_refpclk_macaclk_macptp_ref7!# nstmmacetha) 1DEokay Youtput f qrgmiidefault z    'mdiosnps,dwmac-mdio+ethernet-phy@6ethernet-phy-ieee802.3-c22?stmmac-axi-configMWgrx-queues-configwqueue0queue1tx-queues-configqueue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(?c`fUpsatapmaliverxoobrefasic+ Edisabledsata-port@0@u zsata-phy  phy@fed90000rockchip,rk3588-usbdp-phyz?mWrefclkimmortalpclkutmi(ninitcmnlanepcs_apbpma_apb d w  Eokayphy@fee10000rockchip,rk3588-naneng-combphy?wW refapbpipeFVz=Dnphyapb )  Edisabledphy@fee80000rockchip,rk3588-pcie3-phyz?ypclkHnphy ) Eokayemmc-pwrseqmmc-pwrseq-emmcdefault =yextcon-usb3linux,extcon-usb-gpio defaultEokay"leds gpio-ledsdefaultled-1 $ uheartbeat heartbeat pcie-refclk-gen-clock fixed-clockpcie-refclk-clockgpio-gate-clock? vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s3 !vcc-1v2-s3-regulatorregulator-fixed vcc_1v2_s3OO !vcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@ !chosen serial2:115200n8dc-12v-regulatorregulator-fixeddc_12v gpio-keys gpio-keysdefaultbutton-batlow-n BATLOW#  $ button-slp-btn-n SLP_BTN#  $ button-wake-n WAKE#  $ 'switch-lid-btn-n LID_BTN#  5 $i2s3-soundsimple-audio-card Fi2s _Haikou,I2S-codec v  simple-audio-card,codec simple-audio-card,cpu  sgtl5000-oscillator fixed-clockwvcc3v3-baseboard-regulatorregulator-fixedvcc3v3_baseboard2Z2Z ! svcc3v3-low-noise-regulatorregulator-fixedvcc3v3_low_noise2Z2Z ! vcc5v0-baseboard-regulatorregulator-fixedvcc5v0_baseboardLK@LK@ ! vcc5v0-otg-regulatorregulator-fixed   default  vcc5v0_otg(vcc5v0-usb-regulatorregulator-fixed vcc5v0_usbLK@LK@ !  vddd-audio-1v6-regulatorregulator-fixedvddd_audio_1v6jj !  compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0rtc0ethernet0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellscpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namesoperating-points-v2power-domainsstatusmali-supplyopp-hzopp-microvoltdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkextconsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesdmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeedvqmmc-supplycd-gpiosdisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplycap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vmmc-hs400-1_8vmmc-hs400-enhanced-strobemmc-pwrseqno-sdiono-sdnon-removablesupports-cqerockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellspagesizevcc-supplyfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendVDDA-supplyVDDIO-supplyVDDD-supplynum-csgpio-controller#gpio-cellsspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendrts-gpiosrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsreset-gpiosvpcie3v3-supplyclock_in_outphy-handlephy-modetx_delayrx_delaysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usrockchip,phy-grfid-gpioslinux,default-triggercolorenable-gpiosstdout-pathlabellinux,codewakeup-sourcelinux,input-typesimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssimple-audio-card,frame-mastersimple-audio-card,bitclock-mastersound-daienable-active-high