8P( (friendlyarm,nanopi-r6srockchip,rk3588s +7FriendlyElec NanoPi R6Saliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/ethernet@fe1c0000/mmc@fe2c0000/mmc@fe2e0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0 cpuarm,cortex-a55psci': A Q0,f v@@  cpu@100 cpuarm,cortex-a55psci': f v@@ cpu@200 cpuarm,cortex-a55psci': f v@@ cpu@300 cpuarm,cortex-a55psci': f v@@ cpu@400 cpuarm,cortex-a76psci': A Q0,f v@@cpu@500 cpuarm,cortex-a76psci': f v@@cpu@600 cpuarm,cortex-a76psci': A Q0,f v@@cpu@700 cpuarm,cortex-a76psci': f v@@ idle-statespscicpu-sleeparm,idle-state(9Pdaxq l2-cache-l0cachex@ l2-cache-l1cachex@l2-cache-l2cachex@l2-cache-l3cachex@l2-cache-b0cachex@l2-cache-b1cachex@l2-cache-b2cachex@l2-cache-b3cachex@l3-cachecachex0@display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tz smcscmi arm,scmi-smc+protocol@14 protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0 smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram +sram@0arm,scmi-shmemgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf A Q :corecoregroupstacks 0\]^ jobmmugpu2  @disabledopp-tableoperating-points-v2opp-300000000G N L L Popp-400000000Gׄ N L L Popp-500000000Ge N L L Popp-600000000G#F N L L Popp-700000000G)' N ` ` Popp-800000000G/ N q q Popp-900000000G5 N 5 5 Popp-1000000000G; N P P Pusb@fc000000rockchip,rk3588-dwc3snps,dwc3@:ref_clksuspend_clkbus_clk\otg d iusb2-phyusb3-phy sutmi_wide2|R  @disabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci:!d"iusb2@okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci:!d"iusb2@okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci:#d$iusb2 @disabledusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci:#d$iusb2 @disabledusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(:jihkr&ref_clksuspend_clkbus_clkutmipipe\hostd% iusb3-phy sutmi_wide|4 / @disablediommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-syncI @disablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-syncI @disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdXesyscon@fd58c000rockchip,rk3588-sys-grfsysconX`syscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ asyscon@fd5a6000rockchip,rk3588-vo-grfsysconZ` :syscon@fd5a8000rockchip,rk3588-vo-grfsysconZ:bsyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@syscon@fd5b0000rockchip,rk3588-php-grfsyscon['syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@0rockchip,rk3588-usb2phy:phyclk usb480m_phy0|mVphyapb @disabledotg-portb @disabledsyscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy:phyclk usb480m_phy2|oVphyapb@okay!host-portb@okaym&"syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy:phyclk usb480m_phy3|p Vphyapb @disabled#host-portb @disabled$syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^syscon@fd5f0000rockchip,rk3588-iocsyscon_sram@fd600000 mmio-sram` `+clock-controller@fd7c0000rockchip,rk3588-cru|A]q@QA.2Fq)׫ׄe/ׄ eZ р x'i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=:ts i2cpclk(default+@okayregulator@42rockchip,rk8602Bvdd_cpu_big0_s0dp4)regulator-state-mem?regulator@43 rockchip,rk8603rockchip,rk8602Cvdd_cpu_big1_s0dp4)regulator-state-mem?serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK:baudclkapb_pclkX**]txrx+defaultgq @disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm: pwmpclk,default~ @disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm: pwmpclk-default~ @disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm : pwmpclk.default~ @disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0: pwmpclk/default~ @disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfdcpower-controller!rockchip,rk3588-power-controller+@okaypower-domain@8+power-domain@9  :!#" 012+power-domain@10 :!#"3power-domain@11 :!#"4power-domain@12 :5678power-domain@13 +power-domain@14(:9power-domain@15 ::power-domain@16: ;<=+power-domain@17 : >?@power-domain@21: ABCDEFGH+power-domain@23:CAIpower-domain@14 :9power-domain@15::power-domain@22:Jpower-domain@24:[Z]KL+power-domain@258:ZMpower-domain@268:QNOpower-domain@270:PQRS+power-domain@28 :TUpower-domain@29(:VWpower-domain@30:z{Xpower-domain@31@:WYZ[\power-domain@33!:WZ[power-domain@34":WZ[power-domain@37%:2]power-domain@38&:45power-domain@40(^video-codec@fdc70000rockchip,rk3588-av1-vpulvdpuAACQׄׄ:AC aclkhclk2 |vop@fdd90000rockchip,rk3588-vop BPvopgamma-lut8:]\abcd[7aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vop_2x`abc @disabledports+port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~:]\ aclkifaceI2 @disabled_i2s@fddc0000rockchip,rk3588-i2s-tdm:mclk_txmclk_rxhclkAXd]tx2|Vtx-m @disabledi2s@fddf0000rockchip,rk3588-i2s-tdm:445mclk_txmclk_rxhclkA1Xd]tx2|Vtx-m @disabledi2s@fddfc000rockchip,rk3588-i2s-tdm:00,mclk_txmclk_rxhclkA-Xd]rx2|Vrx-m @disabledqos@fdf35000rockchip,rk3588-qossysconP 5qos@fdf35200rockchip,rk3588-qossysconR 6qos@fdf35400rockchip,rk3588-qossysconT 7qos@fdf35600rockchip,rk3588-qossysconV 8qos@fdf36000rockchip,rk3588-qossyscon` Xqos@fdf39000rockchip,rk3588-qossyscon ]qos@fdf3d800rockchip,rk3588-qossyscon ^qos@fdf3e000rockchip,rk3588-qossyscon Zqos@fdf3e200rockchip,rk3588-qossyscon Yqos@fdf3e400rockchip,rk3588-qossyscon [qos@fdf3e600rockchip,rk3588-qossyscon \qos@fdf40000rockchip,rk3588-qossyscon Vqos@fdf40200rockchip,rk3588-qossyscon Wqos@fdf40400rockchip,rk3588-qossyscon Pqos@fdf40500rockchip,rk3588-qossyscon Qqos@fdf40600rockchip,rk3588-qossyscon Rqos@fdf40800rockchip,rk3588-qossyscon Sqos@fdf41000rockchip,rk3588-qossyscon Tqos@fdf41100rockchip,rk3588-qossyscon Uqos@fdf60000rockchip,rk3588-qossyscon ;qos@fdf60200rockchip,rk3588-qossyscon <qos@fdf60400rockchip,rk3588-qossyscon =qos@fdf61000rockchip,rk3588-qossyscon >qos@fdf61200rockchip,rk3588-qossyscon ?qos@fdf61400rockchip,rk3588-qossyscon @qos@fdf62000rockchip,rk3588-qossyscon 9qos@fdf63000rockchip,rk3588-qossyscon0 :qos@fdf64000rockchip,rk3588-qossyscon@ Iqos@fdf66000rockchip,rk3588-qossyscon` Aqos@fdf66200rockchip,rk3588-qossysconb Bqos@fdf66400rockchip,rk3588-qossyscond Cqos@fdf66600rockchip,rk3588-qossysconf Dqos@fdf66800rockchip,rk3588-qossysconh Eqos@fdf66a00rockchip,rk3588-qossysconj Fqos@fdf66c00rockchip,rk3588-qossysconl Gqos@fdf66e00rockchip,rk3588-qossysconn Hqos@fdf67000rockchip,rk3588-qossysconp Jqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon 3qos@fdf71000rockchip,rk3588-qossyscon 4qos@fdf72000rockchip,rk3588-qossyscon 0qos@fdf72200rockchip,rk3588-qossyscon" 1qos@fdf72400rockchip,rk3588-qossyscon$ 2qos@fdf80000rockchip,rk3588-qossyscon Mqos@fdf81000rockchip,rk3588-qossyscon Nqos@fdf81200rockchip,rk3588-qossyscon Oqos@fdf82000rockchip,rk3588-qossyscon Kqos@fdf82200rockchip,rk3588-qossyscon" Ldfi@fe060000rockchip,rk3588-dfi@&0:epcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie 0?0:CH>MR)aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr'`:ffffHYh0g0pd% ipcie-phy2"T  @ @0 @@dbiapbconfig|). Vpwrpipe+@okay zhilegacy-interrupt-controller fpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie @O0:DI?NSs)aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr'`:jjjjHYh@g@pdk ipcie-phy2"T  @ @0 A@dbiapbconfig|*/ Vpwrpipe+@okay zlilegacy-interrupt-controller jethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(:67Y^50stmmacethclk_mac_refpclk_macaclk_macptp_ref2!|$ Vstmmacethx`'mno@okay outputp $rgmii-rxidqrstudefault-Bmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916defaultv6N F zlpstmmac-axi-configXbrmrx-queues-confignqueue0queue1tx-queues-configoqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(:b_eTosatapmaliverxoobrefasic+ @disabledsata-port@0@dk isata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(:dagVqsatapmaliverxoobrefasic+ @disabledsata-port@0@d% isata-phy  spi@fe2b0000 rockchip,sfc+@:/0clk_sfchclk_sfc+ @disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ :  biuciuciu-driveciu-sampleрdefaultwxyz2(@okay*19G{S|mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ :biuciuciu-driveciu-sample default}2% @disabledmmc@fe2e0000rockchip,rk3588-dwcmshc.A-., Q n6 (:,*+-.corebusaxiblocktimer ~default(|Vcorebusaxiblocktimer@okay1`fti2s@fe470000rockchip,rk3588-i2s-tdmG:+/(mclk_txmclk_rxhclkA)-X**]txrx2&|*+ Vtx-mrx-mdefault( @disabledi2s@fe480000rockchip,rk3588-i2s-tdmH:y}umclk_txmclk_rxhclkX**]txrx|^_ Vtx-mrx-mdefault( @disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI:i2s_clki2s_hclkAX]txrx2&default @disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ:%i2s_clki2s_hclkA"X]txrx2&default @disabledinterrupt-controller@fe600000 arm,gic-v3 `h a8 +msi-controller@fe640000arm,gic-v3-itsdgmsi-controller@fe660000arm,gic-v3-itsfppi-partitionsinterrupt-partition-0interrupt-partition-1 dma-controller@fea10000arm,pl330arm,primecell@ VW:n apb_pclk*dma-controller@fea30000arm,pl330arm,primecell@ XY:o apb_pclki2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c:{ i2cpclk>default+ @disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c:| i2cpclk?default+@okayregulator@42rockchip,rk8602B vdd_npu_s0dp~4)regulator-state-mem?i2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c:} i2cpclk@default+ @disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c:~ i2cpclkAdefault+ @disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c: i2cpclkBdefault+ @disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !:TW pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt:dc tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF:spiclkapb_pclkX**]txrx default+ @disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG:spiclkapb_pclkX**]txrx default+ @disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH:spiclkapb_pclkX]txrxdefault+@okayAQ pmic@0rockchip,rk806B@ default  )) 5) A) M) Y) e) q) }) ) )  )   )  dvs1-null-pins gpio_pwrctrl1 pin_fun0dvs2-null-pins gpio_pwrctrl2 pin_fun0dvs3-null-pins gpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1dp~0 vdd_gpu_s0 regulator-state-mem?dcdc-reg2dp~0vdd_cpu_lit_s0 regulator-state-mem?dcdc-reg3 L q0 vdd_log_s0regulator-state-mem? ( qdcdc-reg4dp~0 vdd_vdenc_s0regulator-state-mem?dcdc-reg5 L 0 vdd_ddr_s0regulator-state-mem? ( Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem Ddcdc-reg70vdd_2v0_pldo_s3regulator-state-mem D (dcdc-reg82Z2Z vcc_3v3_s3regulator-state-mem D (2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem?dcdc-reg10w@w@ vcc_1v8_s3regulator-state-mem D (w@pldo-reg1w@w@ avcc_1v8_s0regulator-state-mem? (w@pldo-reg2w@w@ vcc_1v8_s0regulator-state-mem? (w@pldo-reg3OO avdd_1v2_s0regulator-state-mem?pldo-reg42Z2Z0 avcc_3v3_s0regulator-state-mem?pldo-reg5w@2Z0 vccio_sd_s0|regulator-state-mem?pldo-reg6w@w@ pldo6_s3regulator-state-mem D (w@nldo-reg1 q q vdd_0v75_s3regulator-state-mem D ( qnldo-reg2 P Pavdd_ddr_pll_s0regulator-state-mem? ( Pnldo-reg3 q q avdd_0v75_s0regulator-state-mem?nldo-reg4 P P avdd_0v85_s0regulator-state-mem?nldo-reg5 q q vdd_0v75_s0regulator-state-mem?spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI:spiclkapb_pclkX]txrx default+ @disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL:baudclkapb_pclkX** ]txrxdefaultqg @disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM:baudclkapb_pclkX* * ]txrxdefaultqg@okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN:baudclkapb_pclkX* * ]txrxdefaultqg @disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO:baudclkapb_pclkX ]txrxdefaultqg @disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP:baudclkapb_pclkX ]txrxdefaultqg @disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ:baudclkapb_pclkX ]txrxdefaultqg @disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR:baudclkapb_pclkXdd]txrxdefaultqg @disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS:baudclkapb_pclkXd d ]txrxdefaultqg @disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT:baudclkapb_pclkXd d ]txrxdefaultqg @disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK pwmpclkdefault~ @disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK pwmpclkdefault~ @disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :LK pwmpclkdefault~ @disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:LK pwmpclkdefault~ @disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON pwmpclkdefault~ @disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON pwmpclkdefault~ @disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :ON pwmpclkdefault~ @disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:ON pwmpclkdefault~ @disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ pwmpclkdefault~ @disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ pwmpclkdefault~ @disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :RQ pwmpclkdefault~ @disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:RQ pwmpclkdefault~ @disabledtsadc@fec00000rockchip,rk3588-tsadc:tsadcapb_pclkAQ|VWVtsadc-apbtsadc \ s   gpiootpout @okayadc@fec10000rockchip,rk3588-saradc :saradcapb_pclk|U Vsaradc-apb@okay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c: i2cpclkCdefault+@okay @rtc@51haoyu,hym8563Qhym8563default  i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c: i2cpclkDdefault+ @disabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c: i2cpclkEdefault+ @disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ:spiclkapb_pclkXd d]txrx default+ @disabledefuse@fecc0000rockchip,rk3588-otp :otpapb_pclkphyarb| Votpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[:p apb_pclkdphy@fed60000rockchip,rk3588-hdptx-phy :Trefapbb8|#cde!""Vphyapbinitcmnlaneroplllcpllx @disabledphy@fed80000rockchip,rk3588-usbdp-phyb:lVrefclkimmortalpclkutmi(|   Vinitcmnlanepcs_apbpma_apb    0 @disabled phy@fee00000rockchip,rk3588-naneng-combphy:vW refapbpipeAQb|<CVphyapb @' R@okaykphy@fee20000rockchip,rk3588-naneng-combphy:xW refapbpipeAQb|>EVphyapb @' R@okay%sram@ff001000 mmio-sram +pinctrlrockchip,rk3588-pinctrl x+gpio@fd8a0000rockchip,gpio-bank:qr  h  gpio@fec20000rockchip,gpio-bank:st  h  hgpio@fec30000rockchip,gpio-bank:uv  h@  gpio@fec40000rockchip,gpio-bank:wx  h`  lgpio@fec50000rockchip,gpio-bank:yz  h  pcfg-pull-up tpcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-2  pcfg-pull-up-drv-level-1 t pcfg-pull-up-drv-level-2 t pcfg-pull-none-smt  auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout ~emmc-bus8 emmc-clk emmc-cmd emmc-data-strobe eth1fspigmac1gmac1-miim qgmac1-rx-bus20  sgmac1-tx-bus20    rgmac1-rgmii-clk tgmac1-rgmii-bus@ ugpuhdmii2c0i2c0m2-xfer (i2c1i2c1m0-xfer  i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2s0i2s0-lrck i2s0-sclk i2s0-sdi0 i2s0-sdi1 i2s0-sdi2 i2s0-sdi3 i2s0-sdo0 i2s0-sdo1 i2s0-sdo2 i2s0-sdo3 i2s1i2s1m0-lrck i2s1m0-sclk i2s1m0-sdi0 i2s1m0-sdi1 i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m1-lrck i2s2m1-sclk  i2s2m1-sdi  i2s2m1-sdo  i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp pmupwm0pwm0m0-pins ,pwm1pwm1m0-pins -pwm2pwm2m0-pins .pwm3pwm3m0-pins /pwm4pwm4m0-pins  pwm5pwm5m0-pins pwm6pwm6m0-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m0-pins  pwm15pwm15m0-pins  refclksatasata0sata1sata2sdiosdiom1-pins` }sdmmcsdmmc-bus4@ zsdmmc-clk wsdmmc-cmd xsdmmc-det ysd-s0-pwr  spdif0spdif1spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0 spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m0-pins0 spi4m0-cs0 spi4m0-cs1 tsadctsadc-shut uart0uart0m1-xfer  +uart1uart1m1-xfer   uart2uart2m0-xfer  uart3uart3m1-xfer   uart4uart4m1-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m1-xfer   uart8uart8m1-xfer   uart9uart9m1-xfer   vopbt656gpio-functsadc-gpio-func gpio-keykey1-pin gpio-ledssys-led-pin wan-led-pin lan1-led-pin lan2-led-pin hym8563rtc-int usbtypec5v-pwren vcc5v0-host20-en  rtl8211frtl8211f-rst vchosen serial2:1500000n8adc-keys adc-keys  buttons w@ dbutton-maskrom Maskrom &h 1gpio-keys gpio-keysdefaultbutton-user User & h K2leds gpio-ledsled-0 sys_led h ]heartbeatdefaultled-1 wan_led hdefaultled-2 lan1_led hdefaultled-3 lan2_led hdefaultvcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@)vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s34)vcc-3v3-s0-regulatorregulator-fixed2Z2Z vcc_3v3_s04vcc-3v3-sd-s0-regulatorregulator-fixed s  defaultvcc_3v3_sd_s0--4{vcc3v3-pcie20-regulatorregulator-fixedvcc_3v3_pcie202Z2Z4ivcc5v0-usb-regulatorregulator-fixed vcc5v0_usbLK@LK@4)vcc5v0-usb-otg0-regulatorregulator-fixed s hdefaultvcc5v0_usb_otg0LK@LK@4vcc5v0-host-20-regulatorregulator-fixed s  defaultvcc5v0_host_20LK@LK@4& compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellscpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namesoperating-points-v2power-domainsstatusopp-hzopp-microvoltdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modetx_delayreset-assert-usreset-deassert-ussnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs200-1_8vrockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltdebounce-intervallinux,default-triggerenable-active-high